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NCS7101SN1T1 Datasheet(PDF) 10 Page - ON Semiconductor |
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NCS7101SN1T1 Datasheet(HTML) 10 Page - ON Semiconductor |
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10 / 16 page  NCS7101 http://onsemi.com 10 APPLICATION INFORMATION AND OPERATING DESCRIPTION GENERAL INFORMATION The NCS7101 is a rail−to−rail input, rail−to−rail output operational amplifier that features guaranteed 1.8 volt operation. This feature is achieved with the use of a modified analog CMOS process that allows the implementation of depletion MOSFET devices. The amplifier has a 1.0 MHz gain bandwidth product, 1.2 V/ ms slew rate and is operational over a power supply range less than 1.8 V to as high as 10 V. Inputs The input topology of this device series is unconventional when compared to most low voltage operational amplifiers. It consists of an N−channel depletion mode differential transistor pair that drives a folded cascode stage and current mirror. This configuration extends the input common mode voltage range to encompass the VEE and VCC power supply rails, even when powered from a combined total of less than 1.8 volts. Figures 27 and 28 show the input common mode voltage range versus power supply voltage. The differential input stage is laser trimmed in order to minimize offset voltage. The N−channel depletion mode MOSFET input stage exhibits an extremely low input bias current of less than 40 pA. The input bias current versus temperature is shown in Figure 4. Either one or both inputs can be biased as low as VEE minus 300 mV to as high as 10 V without causing damage to the device. If the input common mode voltage range is exceeded, the output will not display a phase reversal but it may latch in the appropriate high or low state. The device can then be reset by removing and reapplying power. If the maximum input positive or negative voltage ratings are to be exceeded, a series resistor must be used to limit the input current to less than 2.0 mA. The ultra low input bias current of the NCS7101 allows the use of extremely high value source and feedback resistor without reducing the amplifier’s gain accuracy. These high value resistors, in conjunction with the device input and printed circuit board parasitic capacitances Cin, will add an additional pole to the single pole amplifier shown in Figure 30. If low enough in frequency, this additional pole can reduce the phase margin and significantly increase the output settling time. The effects of Cin, can be canceled by placing a zero into the feedback loop. This is accomplished with the addition of capacitor Cfb. An approximate value for Cfb can be calculated by: Cfb + Rin Cin Rfb Figure 30. Input Capacitance Pole Cancellation + − Output Rfb Cin Rin Cfb Cin = Input and printed circuit board capacitance Input Output The output stage consists of complimentary P and N channel devices connected to provide rail−to−rail output drive. With a 2.0 k load, the output can swing within 100 mV of either rail. It is also capable of supplying over 95 mA when powered from 10 V and 3.0 mA when powered from 1.8 V. When connected as a unity gain follower, the NCS7101 can directly drive capacitive loads in excess of 390 pF at room temperature without oscillating but with significantly reduced phase margin. The unity gain follower configuration exhibits the highest bandwidth and is most prone to oscillations when driving a high value capacitive load. The capacitive load in combination with the amplifier’s output impedance, creates a phase lag that can result in an under−damped pulse response or a continuous oscillation. Figure 32 shows the effect of driving a large capacitive load in a voltage follower type of setup. When driving capacitive loads exceeding 390 pF, it is recommended to place a low value isolation resistor between the output of the op amp and the load, as shown in Figure 31. The series resistor isolates the capacitive load from the output and enhances the phase margin. Refer to Figure 33. Larger values of R will result in a cleaner output waveform but excessively large values will degrade the large signal rise and fall time and reduce the output’s amplitude. Depending upon the capacitor characteristics, the isolation resistor value will typically be between 50 to 500 ohms. The output drive capability for resistive and capacitive loads is shown in Figures 2, 3, and 23. Figure 31. Capacitance Load Isolation + − Output R Isolation resistor R = 50 to 500 CL Input Note that the lowest phase margin is observed at cold temperature and low supply voltage. |
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