Electronic Components Datasheet Search |
|
HPC36064 Datasheet(PDF) 5 Page - National Semiconductor (TI) |
|
|
HPC36064 Datasheet(HTML) 5 Page - National Semiconductor (TI) |
5 / 36 page 30 MHz AC Electrical Characteristics (See Notes 1 and 4 and Figure 1 through Figure 5 ) VCC 5V g10% unless otherwise specified TA 0 Cto a70 C for HPC4606446004 b40 Cto a85 C for HPC3606436004 b40 Cto a105 C for HPC2606426004 b55 Cto a125 C for HPC1606416004 Symbol and Formula Parameter Min Max Units Notes fC CKI Operating Frequency 2 30 MHz tC1 1fC CKI Clock Period 33 500 ns tCKIH CKI High Time 15 ns tCKIL CKI Low Time 166 ns tC 2fC CPU Timing Cycle 66 ns tWAIT tC CPU Wait State Period 66 ns tDC1C2R Delay of CK2 Rising Edge after CKI Falling Edge 0 55 ns (Note 2) tDC1C2F Delay of CK2 Falling Edge after CKI Falling Edge 0 55 ns (Note 2) fU fC 8 External UART Clock Input Frequency 375 MHz fMW External MICROWIREPLUS Clock Input Frequency 1875 MHz fXIN fC 22 External Timer Input Frequency 136 MHz tXIN tC Pulse Width for Timer Inputs 66 ns tUWS MICROWIRE Setup Time Master 100 ns Slave 20 tUWH MICROWIRE Hold Time Master 20 ns Slave 50 tUWV MICROWIRE Output Valid Time Master 50 ns Slave 150 tSALE tC a 40 HLD Falling Edge before ALE Rising Edge 90 ns tHWP tC a 10 HLD Pulse Width 76 ns tHAE tC a 85 HLDA Falling Edge after HLD Falling Edge 151 ns (Note 3) tHAD tC a 85 HLDA Rising Edge after HLD Rising Edge 135 ns tBF tC a 66 Bus Float after HLDA Falling Edge 99 ns (Note 5) tBE tC a 66 Bus Enable after HLDA Rising Edge 99 ns (Note 5) tUAS Address Setup Time to Falling Edge of URD 10 ns tUAH Address Hold Time from Rising Edge of URD 10 ns tRPW URD Pulse Width 100 ns tOE URD Falling Edge to Output Data Valid 0 60 ns tOD Rising Edge of URD to Output Data Invalid 5 35 ns (Note 6) tDRDY RDRDY Delay from Rising Edge of URD 70 ns tWDW UWR Pulse Width 40 ns tUDS Input Data Valid before Rising Edge of UWR 10 ns tUDH Input Data Hold after Rising Edge of UWR 20 ns tA WRRDY Delay from Rising Edge of UWR 70 ns This maximum frequency is attainable provided that this external baud clock has a duty cycle such that the high period includes two (2) falling edges of the CK2 clock 5 |
Similar Part No. - HPC36064 |
|
Similar Description - HPC36064 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |