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AS29LV400 Datasheet(PDF) 3 Page - Alliance Semiconductor Corporation

Part # AS29LV400
Description  3V 512K x 8/256K 횞 16 CMOS Flash EEPROM
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Manufacturer  ALSC [Alliance Semiconductor Corporation]
Direct Link  https://www.alliancememory.com
Logo ALSC - Alliance Semiconductor Corporation

AS29LV400 Datasheet(HTML) 3 Page - Alliance Semiconductor Corporation

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®
AS29LV400
March 2001
3/20/01; V.0.9.3
Alliance Semiconductor
P. 3 of 25
Operating modes
L = Low (<VIL) = logic 0; H = High (>VIH) = logic 1; VID = 10.0 ± 1.0V; X = don’t care.
In ×16 mode, BYTE = VIH. In ×8 mode, BYTE = VIL with DQ8-DQ14 in high Z and DQ15 = A-1.
Verification of sector protect/unprotect during A9 = V
ID.
Mode definitions
Mode
CE
OE
WE
A0
A1
A6
A9
RESE T
DQ
ID read MFR code
LLH
L
LLVID
HCode
ID read device code
L
L
H
H
L
L
VID
HCode
Read
L
L
H
A0
A1
A6
A9
H
DOUT
Standby
H
XXX
XXXH
High Z
Output disable
L
H
H
X
XXXH
High Z
Write
L
H
L
A0
A1
A6
A9
H
DIN
Enable sector protect
L
VID
Pulse/L
L
H
L
VID
HX
Sector unprotect
L
VID
Pulse/L
L
HHVID
HX
Temporary sector
unprotect
XXXX
XXXVID
X
Verify sector protect
LLH
L
H
LVID
HCode
Verify sector unprotect
LLH
L
H
H
VID
HCode
Hardware Reset
XXXX
XXXL
High Z
Item
Description
ID MFR code,
device code
Selected by A9 = VID(9.5V–10.5V), CE = OE = A1 = A6 = L, enabling outputs.
When A0 is low (VIL) the output data = 52h, a unique Mfr. code for Alliance Semiconductor Flash products.
When A0 is high (VIH), DOUT represents the device code for the AS29LV400.
Read mode
Selected with C E = O E = L, W E = H. Data is valid in tACC time after addresses are stable, tCE after CE is low
and tOE after OE is low.
Standby
Selected with C E = H. Part is powered down, and ICC reduced to <1.0 µA when CE = VCC ± 0.3V = R ESET.
If activated during an automated on-chip algorithm, the device completes the operation before entering
standby.
Output disable Part remains powered up; but outputs disabled with O E pulled high.
Write
Selected with C E = WE = L, OE = H. Accomplish all Flash erasure and programming through the command
register. Contents of command register serve as inputs to the internal state machine. Address latching occurs
on the falling edge of W E or C E , whichever occurs later. Data latching occurs on the rising edge W E or C E ,
whichever occurs first. Filters on W E prevent spurious noise events from appearing as write commands.
Enable
sector protect
Hardware protection circuitry implemented with external programming equipment causes the device to
disable program and erase operations for specified sectors. For in-system sector protection, refer to Sector
protect algorithm on page 14.
Sector
unprotect
Disables sector protection for all sectors using external programming equipment. All sectors must be
protected prior to sector unprotection. For in-system sector unprotection, refer to Sector unprotect algorithm
on page 14.
Verify sector
protect/
unprotect
Verifies write protection for sector. Sectors are protected from program/erase operations on commercial
programming equipment. Determine if sector protection exists in a system by writing the ID read command
sequence and reading location XXX02h, where address bits A12–17 select the defined sector addresses. A
logical 1 on DQ0 indicates a protected sector; a logical 0 indicates an unprotected sector.


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