High Performance PCI Express Audio Processor

www.cmedia.com.tw

Copyright © C-Media Electronics Inc.

Rev. 1.0 ︱ Page 6/23

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All input data can be analog mixed to output streams

Control Interface

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SPI control interfaces

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Interrupt pin for external MCU read transaction

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Serial EEPROM programming interface for customizing Sub-VendorID/Sub-DeviceID (and even

Vendor/Device IDs as well), storing HDA power-on pin configuration (replacing MB BIOS

function) and 8051 ROM-codes (HDA command transcoder)

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Maximum 9 GPIO pins for external devices control and various purposes

General

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Compliant with Microsoft Win7/8 UAA design guideline and driver

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Pass Windows 7 audio logo certification

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24.576MHz crystal input required with embedded PLL for adaptive clock rate

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Single 3.3V power supply

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3.3 V digital I/O pads with 5V tolerance

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Package and Pin Number: LQFP-80

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Default target codec: CM9882A

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