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854S01AKILF Datasheet(PDF) 1 Page - Integrated Device Technology |
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854S01AKILF Datasheet(HTML) 1 Page - Integrated Device Technology |
1 / 17 page DATASHEET ICS854S01AKI June 15, 2017 1 ©2017 Integrated Device Technology, Inc. 2:1 Differential-to-LVDS Multiplexer ICS854S01I General Description The ICS854S01I is a high performance 2:1 Differential-to-LVDS Multiplexer. The ICS854S01I can also perform differential translation because the differential inputs accept LVPECL, LVDS or CML levels. The ICS854S01I is packaged in a small 3mm x 3mm 16 VFQFN package, making it ideal for use on space constrained boards. Features • 2:1 LVDS MUX • One LVDS output pair • Two differential clock inputs can accept: LVPECL, LVDS, CML • Maximum input/output frequency: 2.5GHz • Translates LVCMOS/LVTTL input signals to LVDS levels by using a resistor bias network on nPCLK0, nPCLK1 • RMS additive phase jitter: 0.06ps (typical) • Propagation delay: 600ps (maximum) • Part-to-part skew: 350ps (maximum) • Full 3.3V supply mode • -40°C to 85°C ambient operating temperature • Available in lead-free (RoHS 6) package 5 6 7 8 16 15 14 13 1 2 3 4 12 11 10 9 PCLK0 nPCLK0 PCLK1 nPCLK1 GND Q nQ GND 0 1 Q nQ PCLK0 nPCLK0 PCLK1 CLK_SEL nPCLK1 Pulldown Pullup/Pulldown Pulldown Pulldown Pullup/Pulldown ICS854S01I 16-Lead VFQFN 3mm x 3mm x 0.925mm package body K Package Top View Block Diagram Pin Assignment |
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