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R5F6418LADFE Datasheet(PDF) 4 Page - Renesas Technology Corp |
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R5F6418LADFE Datasheet(HTML) 4 Page - Renesas Technology Corp |
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4 / 132 page  R01DS0068EJ0120 Rev.1.20 Page 4 of 127 Dec 10, 2014 R32C/118A Group 1. Overview Note: 1. Contact a Renesas Electronics sales office to use the optional features. Table 1.3 Performance Overview for the 144-pin Package (1/2) Unit Function Explanation CPU Central processing unit R32C/100 Series CPU Core • Basic instructions: 108 • Minimum instruction execution time: 15.625 ns (f(CPU) = 64 MHz) • Multiplier: 32-bit × 32-bit 64-bit • Multiply-accumulate unit: 32-bit × 32-bit + 64-bit 64-bit • IEEE-754 compatible FPU: Single precision • 32-bit barrel shifter • Operating mode: Single-chip mode, memory expansion mode, microprocessor mode (optional (1)) Memory Flash memory: 512 Kbytes to 1 Mbyte RAM: 96 Kbytes Data flash: 4 Kbytes × 2 blocks Refer to Table 1.5 for memory size of each product group Voltage Detector Low voltage detector Optional (1) Low voltage detection interrupt Clock Clock generator • 4 circuits (main clock, sub clock, PLL, on-chip oscillator) • Oscillation stop detector: Main clock oscillator stop/restart detection • Frequency divide circuit: Divide-by-2 to divide-by-24 selectable • Low power modes: Wait mode, stop mode External Bus Expansion Bus and memory expansion • Address space: 4 Gbytes (of which up to 64 Mbytes is user accessible) • External bus Interface: Support for wait-state insertion, 4 chip select outputs • Bus format: Separate bus/Multiplexed bus selectable, data bus width selectable (8/16/32 bits) Interrupts Interrupt vectors: 261 External interrupt inputs: NMI, INT × 9, key input × 4 Interrupt priority levels: 7 Watchdog Timer 15 bits × 1 (selectable input frequency from prescaler output) Automatic timer start function is available DMA DMAC 4 channels • Cycle-steal transfer mode • Request sources: 61 • 2 transfer modes: Single transfer, repeat transfer DMAC II • Triggered by an interrupt request of any peripheral • 3 characteristic transfer functions: Immediate data transfer, calculation result transfer, chain transfer I/O Ports Programmable I/O ports • 2 input-only ports • 124 CMOS I/O ports • 40 ports are 5 V tolerant • A pull-up resistor is selectable for every 4 input ports (except 5 V tolerant inputs) |
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