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R5F51103ADFK Datasheet(PDF) 9 Page - Renesas Technology Corp |
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R5F51103ADFK Datasheet(HTML) 9 Page - Renesas Technology Corp |
9 / 108 page R01DS0202EJ0120 Rev.1.20 Page 9 of 108 Jul 29, 2016 RX110 Group 1. Overview 1.3 Block Diagram Figure 1.2 shows a block diagram. Figure 1.2 Block Diagram ICUb: Interrupt controller DTCa: Data transfer controller IWDTa: Independent watchdog timer CRC: CRC (cyclic redundancy check) calculator SCIe/SCIf: Serial communications interface RSPI: Serial peripheral interface RIIC: I 2C bus interface MTU2b: Multi-function timer pulse unit 2 CMT: Compare match timer RTCA: Realtime clock DOC: Data operation circuit CAC: Clock frequency accuracy measurement circuit Clock generation circuit RX CPU RAM ROM Port 0 Port 1 Port 2 Port 3 Port 4 DTCa ICUb Port 5 Port A Port B Port C Port E IWDTa CRC SCIe × 2 channels SCIf × 1 channel RSPI × 1 channel RIIC × 1 channel CMT × 2 channels (unit 0) RTCA 12-bit A/D converter × 14 channels DOC CAC Temperature sensor MTU2b × 4 channels Port H Port J |
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