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S5D9 Datasheet(PDF) 45 Page - Renesas Technology Corp |
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S5D9 Datasheet(HTML) 45 Page - Renesas Technology Corp |
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45 / 115 page  R01DS0303EU0100 Rev.1.00 Page 45 of 115 Nov 3, 2016 S5D9 2. Electrical Characteristics Figure 2.12 Deep Software Standby mode cancellation timing Figure 2.13 Recovery timing from Software Standby mode to Snooze mode 2.3.5 NMI and IRQ Noise Filter Note: 200 ns minimum in Software Standby mode. Note 1. tPcyc indicates the PCLKB cycle. Table 2.17 NMI and IRQ noise filter Item Symbol Min Typ Max Unit Test conditions NMI pulse width tNMIW 200 - - ns NMI digital filter disabled tPcyc × 2 ≤ 200 ns tPcyc × 2*1 -- tPcyc × 2 > 200 ns 200 - - NMI digital filter enabled tNMICK × 3 ≤ 200 ns tNMICK × 3.5*2 -- tNMICK × 3 > 200 ns IRQ pulse width tIRQW 200 - - ns IRQ digital filter disabled tPcyc × 2 ≤ 200 ns tPcyc × 2*1 -- tPcyc × 2 > 200 ns 200 - - IRQ digital filter enabled tIRQCK × 3 ≤ 200 ns tIRQCK × 3.5*3 -- tIRQCK × 3 > 200 ns Oscillator IRQ Internal reset (low is valid) Reset exception handling start Deep Software Standby mode Deep Software Standby reset (low is valid) tDSBY tDSBYWT tSNZ IRQ ICLK(to DTC, SRAM)*1 PCLK ICLK(except DTC, SRAM) Oscillator Software Standby mode Snooze mode Note 1. When SNZCR.SNZDTCEN is set to 1, ICLK is supplied to DTC and SRAM. |
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