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HT82B40R Datasheet(PDF) 30 Page - Holtek Semiconductor Inc |
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HT82B40R Datasheet(HTML) 30 Page - Holtek Semiconductor Inc |
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30 / 54 page  HT82B40R/HT82B40A Rev. 1.70 30 November 5, 2014 Bit No. Label R/W Function 0 SUSPEND R Read only, USB suspend indication. When this bit is set to ²1² (set by the SIE), it indi- cates that the USB bus has entered the suspend mode. The USB interrupt is also trig- gered on any change of this bit. 1 RMOT_ WK W USB remote wake up command. Set by the MCU to force the USB host to leave the suspend mode. When this bit is set to ²1²,a2ms delay for clearing this bit to ²0² is needed to insure the RMWK command is accepted by SIE. 2 URST_FLAG R/W USB reset indication. This bit is set/cleared by the USB SIE. This bit is used to detect which bus (PS2 or USB) is attached. When the URST is set to ²1², this indicates that a USB reset has occurred (the attached bus is USB) and a USB interrupt will be in- itialised. 3 RESUME_O R USB resume indication. When the USB leaves the suspend mode, this bit is set to ²1² (set by the SIE). This bit will appear for 20ms waiting for the MCU to detect. When the RESUME is set by the SIE, an interrupt will be generated to wake-up the MCU. In or- der to detect the suspend state, the MCU should set the USBCKEN and clear SUSP2 (in the SCC register) to enable the SIE detect function. The RESUME will be cleared while SUSP is going to ²0². When the MCU is detecting the SUSP, the condition of RESUME (which wakes-up the MCU ) should be noted and taken into consideration. 4 PS2_DAI R Read only, USBPDN/DATA input 5 PS2_CKI R Read only, USBPDP/CLK input 6 PS2_DAO W Data for driving the USBPDN/DATA pin when working under 3D PS2 mouse function. (Default= ²1²) 7 PS2_CKO W Data for driving the USBPDP/CLK pin when working under 3D PS2 mouse function. (Default= ²1²) USC (20H) Register The USR (USB endpoint interrupt status register) register is used to indicate which endpoint is accessed and to select the serial bus, PS2 or USB. The endpoint request flags, EP0IF, EP1IF and EP2IF, are used to indicate which endpoints are accessed. If an endpoint is accessed, the related endpoint request flag will be set to ²1² and the USB interrupt will occur, if the USB interrupt is enabled and the stack is not full. When the active endpoint request flag is served, the end- point request flag has to be cleared to ²0². Bit No. Label R/W Function 0 EP0_INT R/W When this bit is set to ²1² (set by the SIE), it indicates that endpoint 0 is accessed and a USB interrupt will occur. When the interrupt has been served, this bit should be cleared by firmware. 1 EP1_INT R/W When this bit is set to ²1² (set by the SIE), it indicates that endpoint 1 is accessed and a USB interrupt will occur. When the interrupt has been served, this bit should be cleared by firmware. 2 EP2_INT R/W When this bit is set to ²1² (set by the SIE), it indicates that endpoint 2 is accessed and a USB interrupt will occur. When the interrupt has been served, this bit should be cleared by firmware. 3, 6 ¾¾ Reserved 4 5 MODE_CTRL0 MODE_CTRL1 R/W 00 : Non-USB mode, turn-off V33O, both USBPDP and USBPDN can be read and write - default 01 : Non-USB mode, has 200 W between VDD and V33O, both USBPDP and USBPDN can be read and write 10 : USB mode, 1.5k W between USBPDN and V33O, V33O output 3.3V, both USBPDP and USBPDN are read only 11 : Non-USB mode, V33O output 3.3V, both USBPDP and USBPDN can be read and write 7 USB_flag R/W This flag is used to indicate that the MCUis in the USB mode - Bit=1 This bit is R/W by FW and will be cleared to ²0² after power-on reset - Default=²0² USR (21H) Register |
Similar Part No. - HT82B40R_14 |
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Similar Description - HT82B40R_14 |
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