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HT56R22 Datasheet(PDF) 68 Page - Holtek Semiconductor Inc

Part # HT56R22
Description  TinyPowerTM A/D Type 8-Bit OTP MCU with DAC
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Manufacturer  HOLTEK [Holtek Semiconductor Inc]
Direct Link  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

HT56R22 Datasheet(HTML) 68 Page - Holtek Semiconductor Inc

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HT56R22/HT56R23/HT56R24/HT56R25/HT56R26
Rev. 1.30
68
December 26, 2014
The status of the SPI interface pins is determined by a
number of factors such as whether the device is in the
master or slave mode and upon the condition of cer-
tain control bits such as CSEN, SIMEN and SCS.In
the table I, Z represents an input floating condition.
There are several configuration options associated
with the SPI interface. One of these is to enable the
SIM function which selects the SIM pins rather than
normal I/O pins. Note that if the configuration option
does not select the SIM function then the SIMEN bit in
the SIMCTL0 register will have no effect. Another two
SIM configuration options determine if the CSEN and
WCOL bits are to be used.
Configuration Option
Function
SIM Function
SIM interface or I/O pins
SPI CSEN bit
Enable/Disable
SPI WCOL bit
Enable/Disable
SPI Interface Configuration Options
SPI Registers
There are three internal registers which control the over-
all operation of the SPI interface. These are the SIMDR
data register and two control registers SIMCTL0 and
SIMCTL2. Note that the SIMCTL1 register is only used
by the I
2C interface.
The SIMDR register is used to store the data being
transmitted and received. The same register is used by
both the SPI and I
2 C functions. Before the
microcontroller writes data to the SPI bus, the actual
data to be transmitted must be placed in the SIMDR reg-
ister. After the data is received from the SPI bus, the
microcontroller can read it from the SIMDRregister. Any
transmission or reception of data from the SPI bus must
be made via the SIMDR register.
Bit
76543210
Label SD7 SD6 SD5 SD4 SD3 SD2 SD1 SD0
R/W
R/W R/W R/W R/W R/W R/W R/W R/W
POR
XXXXXXXX
There are also two control registers for the SPI inter-
face, SIMCTL0 and SIMCTL2. Note that the SIMCTL2
register also has the name SIMAR which is used by the
I
2C function. The SIMCTL1 register is not used by the
SPI function, only by the I
2C function. Register
SIMCTL0 is used to control the enable/disable function
and to set the data transmission clock frequency. Al-
though not connected with the SPI function, the
SIMCTL0 register is also used to control the Peripheral
Clock prescaler. Register SIMCTL2 is used for other
control functions such as LSB/MSB selection, write colli-
sion flag etc.
The following gives further explanation of each
SIMCTL1 register bit:
· SIMIDLE
The SIMIDLE bit is used to select if the SPI interface
continues running when the device is in the IDLE
mode. Setting the bit high allows the SPI interface to
maintain operation when the device is in the Idle
mode. Clearing the bit to zero disables any SPI opera-
tions when in the Idle mode.
This SPI/I
2C idle mode control bit is located at
CLKMOD register bit4.
· SIMEN
The bit is the overall on/off control for the SPI inter-
face. When the SIMEN bit is cleared to zero to disable
the SPI interface, the SDI, SDO, SCK and SCS lines
will be in a floating condition and the SPI operating
current will be reduced to a minimum value. When the
bit is high the SPI interface is enabled. The SIMconfig-
uration option must have first enabled the SIM inter-
face for this bit to be effective. Note that when the
SIMEN bit changes from low to high the contents of
the SPI control registers will be in an unknown condi-
tion and should therefore be first initialised by the ap-
plication program.
· SIM0~SIM2
These bits setup the overall operating mode of the SIM
function. As well as selecting if the I
2C or SPI function,
they are used to control the SPI Master/Slave selec-
tion and the SPI Master clock frequency. The SPI
clock is a function of the system clock but can also be
chosen to be sourced from the Timer/Event Counter. If
the SPI Slave Mode is selected then the clock will be
supplied by an external Master device.
Pin
Master/Salve
SIMEN=0
Master
- SIMEN=1
Slave
- SIMEN=1
CSEN=0
CSEN=1
CSEN=0
CSEN=1
SCS=0
CSEN=1
SCS=1
SCS
Z
ZLZ
I, Z
I, Z
SDO
Z
OOOO
Z
SDI
Z
I, Z
I, Z
I, Z
I, Z
Z
SCK
Z
H: CKPOL=0
L: CKPOL=1
H: CKPOL=0
L: CKPOL=1
I, Z
I, Z
Z
Note:
²Z² floating, ²H² output high, ²L² output low, ²I² Input, ²O²output level, ²I,Z² input floating (no pull-high)
SPI Interface Pin Status


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