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HT56R22 Datasheet(PDF) 90 Page - Holtek Semiconductor Inc

Part # HT56R22
Description  TinyPowerTM A/D Type 8-Bit OTP MCU with DAC
Download  127 Pages
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Manufacturer  HOLTEK [Holtek Semiconductor Inc]
Direct Link  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

HT56R22 Datasheet(HTML) 90 Page - Holtek Semiconductor Inc

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HT56R22/HT56R23/HT56R24/HT56R25/HT56R26
Rev. 1.30
90
December 26, 2014
Timer/Event Counter Interrupt
For a Timer/Event Counter interrupt to occur, the global
interrupt enable bit, EMI, and the corresponding timer
interrupt enable bit, TnE, must first be set. An actual
Timer/Event Counter interrupt will take place when the
Timer/Event Counter request flag, TnF, is set, a situation
that will occur when the relevant Timer/Event Counter
overflows. When the interrupt is enabled, the stack is
not full and a Timer/Event Counter n overflow occurs, a
subroutine call to the relevant timer interrupt vector, will
take place. When the interrupt is serviced, the timer in-
terrupt request flag, TnF, will be automatically reset and
the EMI bit will be automatically cleared to disable other
interrupts.
Time Base Interrupt
For a time base interrupt to occur the global interrupt en-
able bit EMI and the corresponding interrupt enable bit
TBE, must first be set. An actual Time Base interrupt will
take place when the time base request flag TBF is set, a
situation that will occur when the Time Base overflows.
When the interrupt is enabled, the stack is not full and a
time base overflow occurs a subroutine call to time base
vector will take place. When the interrupt is serviced, the
time base interrupt flag. TBF will be automatically reset
and the EMI bit will be automatically cleared to disable
other interrupts.
A/D Converter Interrupt
The A/D Converter Interrupt is controlled by the termina-
tion of an A/D conversion process. An A/D Converter In-
terrupt request will take place when the A/D Converter
Interrupt request flag, ADF, is set, which occurs when
the A/D conversion process finishes. To allow the pro-
gram to branch to its respective interrupt vector ad-
dress, the global interrupt enable bit, EMI, and A/D
Interrupt enable bit, ADE, and Multi-function interrupt
enable bits, must first be set.must first be set. When the
interrupt is enabled, the stack is not full and the A/D con-
version process has ended, a subroutine call to the
Multi-function Interrupt vector, will take place. When the
interrupt is serviced, the EMI bit will be automatically
cleared to disable other interrupts, however only the
Multi-function interrupt request flag will be also automat-
ically cleared. As the ADF flag will not be automatically
cleared, it has to be cleared by the application program.
Serial Interface Module Interrupt
The Serial Interface Module Interrupt, also known as the
SIM interrupt, is contained within the Multi-function In-
terrupt. A SIM Interrupt request will take place when the
SIM Interrupt request flag, SIMF, is set, which occurs
when a byte of data has been received or transmitted by
the SIM interface. To allow the program to branch to its
respective interrupt vector address, the global interrupt
enable bit, EMI, and the Serial Interface Interrupt enable
bit, SIME, and Multi-function interrupt enable bits, must
first be set. When the interrupt is enabled, the stack is
not full and a byte of data has been transmitted or re-
ceived by the SIM interface, a subroutine call to the
Multi-function Interrupt vector, will take place. When the
Serial Interface Interrupt is serviced, the EMI bit will be
automatically cleared to disable other interrupts, how-
ever only the Multi-function interrupt request flag will be
also automatically cleared. As the SIMF flag will not be
automatically cleared, it has to be cleared by the appli-
cation program.
External Peripheral Interrupt
The External Peripheral Interrupt operates in a similar
way to the external interrupt and is contained within the
Multi-function Interrupt. A Peripheral Interrupt request
will take place when the External Peripheral Interrupt re
quest flag, XPF, is set, which occurs when a negative
edge transition appears on the PINT pin. To allow the
program to branch to its respective interrupt vector ad-
dress, the global interrupt enable bit, EMI, external pe-
ripheral interrupt enable bit, XPE, and Multi-function
interrupt enable bit, must first be set. When the inter-
rupt is enabled, the stack is not full and a negative tran-
sition appears on the External Peripheral Interrupt pin,
a subroutine call to the Multi-function Interrupt, will
take place. When the External Peripheral Interrupt is
serviced, the EMI bit will be automatically cleared to dis-
able other interrupts, however only the Multi-function in-
terrupt request flag will be also automatically cleared.
As the XPF flag will not be automatically cleared, it has
to be cleared by the application program. The external
peripheral interrupt pin is pin-shared with several other
pins with different functions. It must therefore be prop-
erly configured to enable it to operate as an External Pe-
ripheral Interrupt pin.


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