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74FCT540 Datasheet(PDF) 4 Page - Integrated Device Technology |
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74FCT540 Datasheet(HTML) 4 Page - Integrated Device Technology |
4 / 6 page 4 INDUSTRIALTEMPERATURERANGE IDT74FCT540AT/CT FASTCMOSOCTALBUFFER/LINEDRIVER NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25°C ambient. 3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fiNi) ICC = Quiescent Current ∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fi = Input Frequency Ni = Number of Inputs at fi All currents are in milliamps and all frequencies are in megahertz. POWER SUPPLY CHARACTERISTICS Symbol Parameter Test Conditions(1) Min. Typ.(2) Max. Unit ∆ICC Quiescent Power Supply Current TTL Inputs HIGH VCC = Max. VIN = 3.4V(3) —0.5 2 mA ICCD Dynamic Power Supply Current(4) VCC = Max. Outputs Open OEA = OEB = GND VIN = VCC VIN = GND — 0.15 0.25 mA/ MHz One Input Toggling 50% Duty Cycle IC Total Power Supply Current(6) VCC = Max. VIN = VCC —1.5 3.5 mA Outputs Open fi = 10MHz VIN = GND 50% Duty Cycle OEA = OEB = GND VIN = 3.4 VIN = GND —1.8 4.5 One Bit Toggling VCC = Max. VIN = VCC —3 6(5) Outputs Open fi = 2.5MHz VIN = GND 50% Duty Cycle OEA = OEB = GND VIN = 3.4 VIN = GND —5 14(5) Eight Bits Toggling SWITCHING CHARACTERISTICS OVER OPERATING RANGE FCT540AT FCT540CT Symbol Parameter Condition(1) Min.(2) Max. Min.(2) Max. Unit tPLH tPHL Propagation Delay DN to ON CL = 50pF RL = 500 Ω 1.5 4.8 1.5 4.3 ns tPZH tPZL Output Enable Time 1.5 6.2 1.5 5.8 ns tPHZ tPLZ Output Disable Time 1.5 5.6 1.5 5.2 ns NOTES: 1. See Test Circuit and Waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. |
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