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CS4399 Datasheet(PDF) 1 Page - Cirrus Logic

Part # CS4399
Description  130-dB, 32-Bit High-Performance DAC
Download  111 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS4399 Datasheet(HTML) 1 Page - Cirrus Logic

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Copyright
 Cirrus Logic, Inc. 2015–2016
(All Rights Reserved)
http://www.cirrus.com
130-dB, 32-Bit High-Performance DAC
System Features
• Enhanced
 oversampling DAC architecture
— 32-bit resolution
— Up to 384-kHz sampling rate
— Low clock jitter sensitivity
— Auto mute detection
• Integrated high performance outputs
— 130-dB dynamic range (A-weighted)
— –108-dB total harmonic distortion + noise (THD+N)
— 110-dB interchannel isolation
• Headphone detection
— Headphone plug-in detection
— Popguard® technology eliminates pop noise
• Integrated PLL
— Support for 11.2896-/22.5792-, 12.288-/24.576-, 9.6-/
19.2-, 12-/24-, and 13-/26-MHz system MCLK rates
— Reference clock sourced from XTI/MCLK pin
— System clock output
• Mono mode support
•I2C control—up to 1 MHz
• Direct Stream Digital (DSD®) path
— Patented DSD processor
– On-chip 50-kHz filter to meet Scarlet Book Super
Audio Compact Disk (SACD) recommendations
– Matched PCM and DSD analog output levels
– Nondecimating volume control with 0.5-dB step size
and soft ramp
– DSD and Pulse-code modulation (PCM) mixing for
alerts
— Dedicated DSD and DoP pin interface
• Serial audio input path
— Five selectable digital filter responses
– Low-latency mode minimizes pre-echo
– 110 dB of stopband attenuation
— Supports sample rates from 32 to 384 kHz
—I2S, right-justified, left-justified, TDM, and
DSD-over-PCM (DoP) interface
— Master or slave operation
— Volume control with 0.5-dB step size and soft ramp
— 44.1 kHz deemphasis and inverting feature
• 40-pin QFN or 42-ball CSP package option
Applications
• Smart phones, tablets, portable media players, laptops,
digital headphones, powered speakers, AVR, home
theater systems, Blu-ray/DVD/SACD players and pro
audio
VCP_FILT+
Multibit

Modulator
Multibit

Modulator
Interpolation
Filter and
Volume
Control
DSD
Processor
Interpolation
Filter and
Volume
Control
Control Port Level Translator
Register /Hardware
Configuration
PLL
XTI/MCLK
DoP to
DSD
Engine
Analog Supply
(VA,VCP)
+1.8V
FILT +
Popguard®
Circuitry
ASP
FLYN _VCP
FLYP_VA
XTAL
OSC
XTO
VCP_FILT+
VCP_FILT -
FLYN_VA
-VA
Charge Pump
Interrupt
Sources
Internal
Voltage
Reference
AOUTA
REFA
XSP/DSD
Audio
Interface
FILT-
FLYP_VCP
VA
-VA
FLYC_VCP
Battery Supply
(VP)
VCP_FILT -
INT
ADR
SDA
SCL
RESET
CLKOUT
Digital LDOs
Digital Core
Interface
Supply (VL)
+1.8V
Internal
Supply (VD)
+1.8V
TSO
DAC and Filter
VCP_FILT+
VCP_FILT -
AOUTB
REFB
DAC and Filter
VA
-VA
HPDETECT
HP_DETECT
SCLK1
LRCK1
SDIN1
DSDCLK/SCLK2
DSDB/LRCLK2
DSDA/SDIN2
DS1113F1
DEC ‘16
CS4399


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