ADC10080 datasheet(8/19 Pages) NSC

Part #	ADC10080

Description	10-Bit, 80 MSPS, 3V, 78.6 mW A/D Converter

Download	19 Pages

Scroll/Zoom	100%

Manufacturer	NSC [National Semiconductor (TI)]

Direct Link	http://www.national.com

Logo

8 / 19 page

Specification Definitions

APERTURE DELAY is the time after the rising edge of the

clock to when the input signal is acquired or held for conver-

sion.

APERTURE JITTER (APERTURE UNCERTAINTY) is the

variation in aperture delay from sample to sample. Aperture

jitter manifests itself as noise in the output.

COMMON MODE VOLTAGE (V

CM)

is the d.c. potential

present at both signal inputs to the ADC.

CONVERSION LATENCY See PIPELINE DELAY.

DIFFERENTIAL NON-LINEARITY (DNL) is the measure of

the maximum deviation from the ideal step size of 1 LSB.

DUTY CYCLE is the ratio of the time that a repetitive digital

waveform is high to the total time of one period. The speci-

fication here refers to the ADC clock input signal.

EFFECTIVE NUMBER OF BITS (ENOB, or EFFECTIVE

BITS) is another method of specifying Signal-to-Noise and

Distortion or SINAD. ENOB is defined as (SINAD - 1.76) /

6.02 and states that the converter is equivalent to a perfect

ADC of this (ENOB) number of bits.

FULL POWER BANDWIDTH is a measure of the frequency

at which the reconstructed output fundamental drops 3 dB

below its low frequency value for a full scale input.

GAIN ERROR is the deviation from the ideal slope of the

transfer function. It can be calculated as:

Gain Error = Positive Full-Scale Error − Negative Full-

Scale Error

INTEGRAL NON LINEARITY (INL) is a measure of the

deviation of each individual code from a line drawn from

negative full scale (1⁄2 LSB below the first code transition)

through positive full scale (1⁄2 LSB above the last code

transition). The deviation of any given code from this straight

line is measured from the center of that code value.

MISSING CODES are those output codes that will never

appear at the ADC outputs. The ADC10080 is guaranteed

not to have any missing codes.

NEGATIVE FULL SCALE ERROR is the difference between

the input voltage (V

IN+ −VIN−) just causing a transition from

negative full scale to the first code and its ideal value of

0.5 LSB.

OFFSET ERROR is the input voltage that will cause a tran-

sition from a code of 01 1111 1111 to a code of 10 0000 0000.

OUTPUT DELAY is the time delay after the rising edge of

the clock before the data update is presented at the output

pins.

PIPELINE DELAY (LATENCY) is the number of clock cycles

between initiation of conversion and when that data is pre-

sented to the output driver stage. Data for any given sample

is available at the output pins the Pipeline Delay plus the

Output Delay after the sample is taken. New data is available

at every clock cycle, but the data lags the conversion by the

pipeline delay.

POSITIVE FULL SCALE ERROR is the difference between

the actual last code transition and its ideal value of 11⁄2 LSB

below positive full scale.

SIGNAL TO NOISE RATIO (SNR) is the ratio, expressed in

dB, of the rms value of the input signal to the rms value of the

sum of all other spectral components below one-half the

sampling frequency, not including harmonics or dc.

SIGNAL TO NOISE PLUS DISTORTION (S/N+D or SINAD)

Is the ratio, expressed in dB, of the rms value of the input

signal to the rms value of all of the other spectral compo-

nents below half the clock frequency, including harmonics

but excluding dc.

SPURIOUS FREE DYNAMIC RANGE (SFDR) is the differ-

ence, expressed in dB, between the rms values of the input

signal and the peak spurious signal, where a spurious signal

is any signal present in the output spectrum that is not

present at the input.

TOTAL HARMONIC DISTORTION (THD) is the ratio, ex-

pressed in dBc, of the rms total of the first six harmonic

levels at the output to the level of the fundamental at the

output. THD is calculated as:

where f

1 is the RMS power of the fundamental (output)

frequency and f

2 through f6 are the RMS power in the first 6

harmonic frequencies.

Second Harmonic Distortion (2nd Harm) is the difference

expressed in dB, between the RMS power in the input

frequency at the output and the power in its 2nd harmonic

level at the output.

Third Harmonic Distortion (3rd Harm) is the difference,

expressed in dB, between the RMS power in the input

frequency at the output and the power in its 3rd harmonic

level at the output.

www.national.com

8

Similar Part No. - ADC10080

Manufacturer	Part #	Datasheet	Description
Texas Instruments	ADC10080	1Mb / 24P	[Old version datasheet] 10-Bit, 80 MSPS, 3V, 78.6 mW A/D Converter
	ADC10080	1Mb / 26P	[Old version datasheet] 78.6 mW A/D Converter
	ADC10080CIMT/NOPB	1Mb / 26P	[Old version datasheet] 78.6 mW A/D Converter
	ADC10080CIMTX/NOPB	1Mb / 26P	[Old version datasheet] 78.6 mW A/D Converter
	ADC10080	1Mb / 24P	[Old version datasheet] 10-Bit, 80 MSPS, 3V, 78.6 mW A/D Converter

More results

Similar Description - ADC10080

Manufacturer	Part #	Datasheet	Description
Texas Instruments	ADC10080	1Mb / 24P	[Old version datasheet] 10-Bit, 80 MSPS, 3V, 78.6 mW A/D Converter
National Semiconductor ...	ADC10040	914Kb / 19P	10-Bit, 40 MSPS, 3V, 55.5 mW A/D Converter
Texas Instruments	ADC10080	1Mb / 26P	[Old version datasheet] 78.6 mW A/D Converter
Analog Devices	AD9215	1Mb / 36P	10-Bit, 65/80/105 MSPS, 3V A/D Converter REV. A
	AD9200	338Kb / 24P	Complete 10-Bit, 20 MSPS, 80 mW CMOS A/D Converter REV. E
	AD9200	341Kb / 24P	Complete 10-Bit, 20 MSPS, 80 mW CMOS A/D Converter REV. E
Texas Instruments	ADC10040	1Mb / 28P	[Old version datasheet] ADC10040/ADC10040Q 10-Bit, 40 MSPS, 3V, 55.5 mW A/D Converter
List of Unclassifed Man...	SPT7868	47Kb / 5P	10-BIT,80 MSPS A/D CONVERTER
Cadeka Microcircuits LL...	SPT7840	188Kb / 12P	10-BIT, 10 MSPS, 100 mW A/D CONVERTER
Fairchild Semiconductor	SPT7840	95Kb / 12P	10-BIT, 10 MSPS, 100 mW A/D CONVERTER

More results

ADC10080 Datasheet(PDF) 8 Page - National Semiconductor (TI)

ADC10080 Datasheet(HTML) 8 Page - National Semiconductor (TI)

Similar Part No. - ADC10080

Similar Description - ADC10080

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

Datasheet Download

Link URL