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MINI54FHC Datasheet(PDF) 2 Page - List of Unclassifed Manufacturers |
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2 / 70 page NuMicro MINI51 DE Series Datasheet May 22, 2014 Page 2 of 70 Revision 1.01 Table of Contents 1 GENERAL DESCRIPTION................................................................................................. 7 2 FEATURES ...........................................................................................8 3 ABBREVIATIONS .................................................................................12 4 PARTS INFORMATION LIST AND PIN CONFIGURATION ..............................13 NuMicro Mini51 Series Selection Code ..........................................................13 4.1 NuMicro Mini51 Series Product Selection Guide ...............................................14 4.2 PIN CONFIGURATION ...............................................................................15 4.3 4.3.1 LQFP 48-pin .................................................................................................... 15 4.3.2 QFN 33-pin ................................................................................................................................ 16 4.3.3 TSSOP 20-pin............................................................................................................................ 17 4.3.4 Mini54FHC (TSSOP20-pin)........................................................................................................ 17 Pin Description .........................................................................................18 4.4 5 BLOCK DIAGRAM ................................................................................22 NuMicro Mini51™ Block Diagram ...................................................................22 5.1 6 Functional Description ............................................................................23 Memory Organization .................................................................................23 6.1 6.1.1 Overview.................................................................................................................................... 23 6.1.2 System Memory Map ................................................................................................................. 23 Nested Vectored Interrupt Controller (NVIC) ......................................................24 6.2 6.2.1 Overview.................................................................................................................................... 24 6.2.2 Features..................................................................................................................................... 24 6.2.3 Exception Model and System Interrupt Map ............................................................................... 25 6.2.4 Vector Table .............................................................................................................................. 26 6.2.5 Operation Description ................................................................................................................ 27 System Manager .......................................................................................28 6.3 6.3.1 Overview.................................................................................................................................... 28 6.3.2 System Reset ............................................................................................................................ 28 6.3.3 System Power Architecture ........................................................................................................ 28 6.3.4 Whole System Memory Mapping ............................................................................................... 30 Clock Controller ........................................................................................31 6.4 6.4.1 Overview.................................................................................................................................... 31 6.4.2 System Clock and SysTick Clock ............................................................................................... 32 6.4.3 ISP Clock Source Selection ....................................................................................................... 33 |
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