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ADS-944MM Datasheet(PDF) 5 Page - List of Unclassifed Manufacturers

Part # ADS-944MM
Description  14-Bit, 5MHz Sampling A/D Converters
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ADS-944
5
®
®
TIMING
The ADS-944 is an edge-triggered device. A conversion is
initiated by the rising edge of the start convert pulse and no
additional external timing signals are required. The device
does not employ "pipeline" delays to increase its throughput
rate. It does not require multiple start convert pulses to bring
valid digital data to its output pins.
Approximately 10ns after the rising edge of the start convert
signal, the ADS-944's internal sample-hold amplifier is driven
into the hold mode by the internal S/H control line. After a
35ns delay to allow for S/H output transient settling, the
conversion process begins, and the EOC line (pin 16) is driven
high. The complete A/D conversion requires approximately
150ns. The falling of EOC signals that the conversion is now
complete and digital output data is now valid.
This device actually guarantees that digital output data will be
valid for 10ns prior to the falling edge of EOC. Therefore, EOC
can be used to latch data into external registers that have
appropriate setup times. Any other available timing edges,
including a delayed EOC or the rising edge of the next EOC
pulse, can also be used for this purpose.
The falling edge of the start convert pulse, though irrelevant to
device timing, can cause conversion errors if it occurs at
certain times. Therefore, the recommended start convert
pulse width is between 40 and 80ns or between 130 and
160ns. DATEL performs ADS-944 production testing at the full
5MHz sampling rate using 80ns start convert pulses.
Table 1. Output Coding
OUTPUT CODING
INPUT RANGE
BIPOLAR
MSB
LSB
MSB
LSB
MSB
LSB
±1.25V
SCALE
OFF. BINARY
COMP. OFF. BIN.
TWO'S COMP.
11 1111 1111 1111
00 0000 0000 0000 01 1111 1111 1111
+1.249847
+FS –1 LSB
11 1000 0000 0000
00 1111 1111 1111
01 1000 0000 0000
+0.937500
+3/4 FS
11 0000 0000 0000
00 1111 1111 1111
01 0000 0000 0000
+0.625000
+1/2FS
10 0000 0000 0000 01 1111 1111 1111
00 0000 0000 0000
0.000000
0
01 0000 0000 0000 10 1111 1111 1111
11 0000 0000 0000
–0.625000
–1/2FS
00 1000 0000 0000 11 0111 1111 1111
10 1000 0000 0000
–0.937500
–3/4FS
00 0000 0000 0001 11 1111 1111 1110
10 0000 0000 0001
–1.249847
–FS +1 LSB
00 0000 0000 0000 11 1111 1111 1111
10 0000 0000 0000
–1.250000
–FS
Figure 3. ADS-944 Timing Diagram
THERMAL REQUIREMENTS
All DATEL sampling A/D converters are fully characterized and
specified over operating temperature (case) ranges of 0 to
+70°C and –55 to +125°C. All room-temperature (TA = +25°C)
production testing is performed without the use of heat sinks or
forced-air cooling. Thermal impedance figures for each device
are listed in their respective specification tables.
These devices do not normally require heat sinks, however,
standard precautionary design and layout procedures should
be used to ensure devices do not overheat. The ground and
power planes beneath the package, as well as all pcb signal
runs to and from the device, should be as heavy as possible to
help conduct heat away from the package.
Electrically-insulating, thermally-conductive "pads" may be
installed underneath the package. Devices should be
soldered to boards rather than "socketed", and of course,
minimal air flow over the surface can greatly help reduce the
package temperature.
In more severe ambient conditions, the package/junction
temperature of a given device can be reduced dramatically
(typically 35%) by using one of DATEL's HS Series heat sinks.
See Ordering Information for the assigned part number. See
page 1-183 of the DATEL Data Acquisition Components
Catalog for more information on the HS Series. Request
DATEL Application Note AN-8, "Heat Sinks for DIP Data
Converters", or contact DATEL directly, for additional
information.
START
CONVERT
OUTPUT
DATA
INTERNAL S/H
N
N+1
DATA (N-1) VALID
Acquisition Time
10ns typ.
DATA N VALID
Note: Scale is approximately 10ns per division.
EOC
Conversion Time
INVALID
DATA
35ns typ.
Hold
80ns typ.
115ns typ.
150ns typ., 160ns max.
60ns typ., ±10ns
Hold
140ns min., 150ns typ.
Œ
ΠSTART CONVERT pulse width: 40 to 80ns or 130 to 160ns.
50ns typ., 60ns max.
90ns max.


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