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FSCM0565RI Datasheet(PDF) 10 Page - Fairchild Semiconductor |
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FSCM0565RI Datasheet(HTML) 10 Page - Fairchild Semiconductor |
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10 / 20 page  FSCM0765R 10 Functional Description 1. Startup: Figure 16 shows the typical startup circuit and transformer auxiliary winding for the FSCM0765R application. Before the FSCM0765R begins switching, it consumes only startup current (typically 25uA) and the current supplied from the DC link supply current consumed by the FPS (Icc), and charges the external capacitor (Ca) that is connected to the Vcc pin. When Vcc reaches start voltage of 12V (VSTART), the FSCM0765R begins switching, and the current consumed by FSCM0765R increases to 3mA. Then, the FSCM0765R continues its normal switching operation and the power required for this device is supplied from the transformer auxiliary winding, unless Vcc drops below the stop voltage of 8V (VSTOP). To guarantee the stable operation of the control IC, Vcc has under voltage lockout (UVLO) with 4V hysteresis. Figure 17 shows the relation between the current consumed by the FPS (Icc) and the supply voltage (Vcc). Figure 16. Startup Circuit Figure 17. Relation Between O perating Supply Current and Vcc Voltage The minimum current supplied through the startup resistor is given by where Vline min is the minimum input voltage, Vstart is the start voltage (12V) and Rstr is the startup resistor. The startup resistor should be chosen so that Isup min is larger than the maximum startup current (40uA). If not, Vcc can not be charged to the start voltage and FPS will fail to start up. 2. Feedback Control: The FSCM0765R employs current mode control, as shown in Figure 18. An opto-coupler (such as the H11A817A) and a shunt regulator (such as the KA431) are typically used to implement the feedback network. Comparing the feedback voltage with the voltage across the Rsense resistor makes it possible to control the switching duty cycle. When the reference pin voltage of the KA431 exceeds the internal reference voltage of 2.5V, the H11A817A LED current increases, thus pulling down the feedback voltage and reducing the duty cycle. This event typically happens when the input voltage is increased or the output load is decreased. 2.1 Pulse-by-pulse Current Limit: Because current mode control is employed, the peak current through the SenseFET is determined by the inverting input of the PWM comparator (Vfb*) as shown in Figure 18. When the current through the opto transistor is zero and the current limit pin (#5) is left floating, the feedback current source (IFB) of 0.9mA flows only through the internal resistor (R+2.5R=2.8k). In this case, the cathode voltage of diode D2 and the peak drain current have maximum values of 2.5V and 3A, respectively. The pulse-by-pulse current limit can be adjusted using a resistor to GND on the current limit pin (#5). The current limit level using an external resistor (RLIM) is given by: Figure 18. Pulse Width Modulation (PWM) Circuit FSCM 0765R Rstr V CC Ca Da I SUP AC line (V line min - V line max ) C DC I CC I CC V CC Vstop=8V 25uA 3mA Vstart=12V Vz Power Up Power Down I sup min 2V line min ⋅ V start – () 1 R str ------------ ⋅ = I LIM R LIM 3A ⋅ 2.8k Ω R LIM + ------------------------------------ = 4 OSC Vcc Vref I delay I FB V SD R 2.5R Gate driver OLP D1 D2 + V fb* - Vfb KA431 C B Vo H11A817A R sense SenseFET 6 R LI M 0.9mA 0.3k |
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Similar Description - FSCM0565RI |
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