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G751-1 Datasheet(PDF) 1 Page - List of Unclassifed Manufacturers |
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G751-1 Datasheet(HTML) 1 Page - List of Unclassifed Manufacturers |
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1 / 10 page  Ver: 2.2 Nov 07 2001 TEL: 886-3-5788833 http://www.gmt.com.tw 1 G751 Global Mixed-mode Technology Inc. Digital Temperature Sensor and Thermal Watchdog with Two-Wire Interface Features SMBus interface Programmable Trip Point (TOS) and Hysteresis (THYST) Separate open-drain output pin operates as interrupt or comparator at output Register readback capability Power up defaults permit stand-alone opera- tion as thermostat Shutdown mode to minimize power consump- tion Up to 8 G751s can be connected to a single bus Key Specifications Supply Voltage 3.0V to 5.5V Supply Current operating 280µA (typ) 1mA (max) shutdown 2µA(typ) Temperature Accuracy -25°C to 100°C ±2°C (max) -55°C to 125°C ±3°C (max) Applications System Thermal Management Personal Computers Office Electronics Electronic Test Equipment Pin Configuration General Description The G751 is a temperature sensor, Delta-Sigma analog-to-digital converter, and digital over- tem- perature detector with SMBus interface. The host can query the G751 at any time to read temperature. The open-drain Over temperature Shutdown (O.S.) output becomes active when the temperature ex- ceeds a programmable limit. This pin can operate in either “Comparator” or “Interrupt” mode. The host can program both the temperature alarm threshold (TOS) and the temperature at which the alarm condition goes away (THYST). In addition, the host can read back the contents of the G751’s TOS and THYST registers. The sensor powers up in Com- parator mode with default thresholds of 50°C TOS 45°C THYST. for G751-1 and 80°C TOS , 75°C THYST for G751-2. Ordering Information PART TOS THYST Transport Media PACKAGE G751-1 50°C/45°C 2500 Units on Tape and Reel 8 SOP G751-2 80°C /75°C 2500 Units on Tape and Reel 8 SOP Typical Application SMBDATA 8Pin SOP 1 2 3 45 6 7 8 G751 +Vs A0 A1 A2 SMBCLK O.S. GND G751 +V S 3V to 5.5V Typical Bypass 0.1 µF (Unless mounted close to Processor) To Processor Interrupt Line O.S. Set for active low for wire OR’d multiple interrupt line Address(Set as desired) Interface 8 3 O.S. Out 4 7 6 5 1 2 A0 A1 A2 SMBDATA SMBCLK SMBDATA 8Pin SOP 1 2 3 45 6 7 8 G751 +Vs A0 A1 A2 SMBCLK O.S. GND SMBDATA 8Pin SOP 1 2 3 45 6 7 8 G751 +Vs A0 A1 A2 SMBCLK O.S. GND G751 +V S 3V to 5.5V Typical Bypass 0.1 µF (Unless mounted close to Processor) To Processor Interrupt Line O.S. Set for active low for wire OR’d multiple interrupt line Address(Set as desired) Interface 8 3 O.S. Out 4 7 6 5 1 2 A0 A1 A2 SMBDATA SMBCLK G751 +V S 3V to 5.5V Typical Bypass 0.1 µF (Unless mounted close to Processor) To Processor Interrupt Line O.S. Set for active low for wire OR’d multiple interrupt line Address(Set as desired) Interface 8 3 O.S. Out 4 7 6 5 1 2 A0 A1 A2 SMBDATA SMBCLK |
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