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ICS84329AYT Datasheet(PDF) 1 Page - Integrated Circuit Systems |
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ICS84329AYT Datasheet(HTML) 1 Page - Integrated Circuit Systems |
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1 / 19 page  84329AV www.icst.com/products/hiperclocks.html REV. D DECEMBER 15, 2004 1 Integrated Circuit Systems, Inc. ICS84329 700MHZ, LOW JITTER, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER GENERAL DESCRIPTION The ICS84329 is a general purpose, single output high frequency synthesizer and a member of the HiPerClockS™family of High Performance Clock Solutions from ICS. The VCO operates at a fre- quency range of 200MHz to 700MHz. The VCO frequency is programmed in steps equal to the value of the crystal frequency divided by 16. The VCO and output frequency can be programmed using the serial or parallel interfaces to the configuration logic. The output can be configured to divide the VCO frequency by 1, 2, 4, and 8. Output frequency steps as small as 125KHz to 1MHz can be achieved using a 16MHz crystal depending on the output dividers. FEATURES • Fully integrated PLL, no external loop filter requirements • 1 differential 3.3V LVPECL output • Series resonant crystal oscillator interface • Output frequency range: 25MHz to 700MHz • VCO range: 200MHz to 700MHz • Parallel interface for programming counter and output dividers during power-up • Serial 3 wire interface • RMS Period jitter: 5.5ps (maximum) • Cycle-to-cycle jitter: 35ps (maximum) • 3.3V supply voltage • 0°C to 70°C ambient operating temperature • Lead-Free package fully RoHS compliant • Pin compatible with the MC12429 HiPerClockS™ ICS PIN ASSIGNMENT ICS84329 32-Lead LQFP Y package 7mm x 7mm x 1.4mm Top View 32 31 30 29 28 27 26 25 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 nc N1 N0 M8 M7 M6 M5 M4 S_CLOCK S_DATA S_LOAD VCCA VCCA nc nc XTAL_IN BLOCK DIAGRAM ICS84329 28-Lead PLCC V Package 11.6mm x 11.4mm x 4.1mm Top View 25 24 23 22 21 20 19 5 6 7 8 9 10 11 26 27 28 1 2 3 4 18 17 16 15 14 13 12 S_CLOCK S_DATA S_LOAD VCCA nc nc XTAL_IN N1 N0 M8 M7 M6 M5 M4 OSC XTAL_IN XTAL_OUT S_LOAD S_DATA S_CLOCK nP_LOAD M0:M8 N0:N1 VCO PLL TEST CONFIGURATION INTERFACE LOGIC ÷ M ÷ 16 PHASE DETECTOR FOUT nFOUT ÷1 ÷2 ÷4 ÷8 1 0 OE |
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