1

2

3

4

5

6

7

14

13

12

11

10

9

8

DISCHARGE

THRESHOLD

CTRL VOLTAGE

RESET

OUTPUT

TRIGGER

GND

TRIGGER

OUTPUT

RESET

CTRL VOLTAGE

THRESHOLD

VCC

DISCHARGE

3

LM556-MIL

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SNAS746 – JUNE 2017

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5 Pin Configuration and Functions

D or NFF Package

14-Pin SOIC or PDIP

Top View

Pin Functions

PIN

I/O

DESCRIPTION

NAME

NO.

CONTROL

VOLTAGE

(Timer 0)

3

I

Controls the threshold and trigger levels. It determines the pulse width of the output

waveform. An external voltage applied to this pin can also be used to modulate the output

waveform.

CONTROL

VOLTAGE

(Timer 1)

11

I

Controls the threshold and trigger levels. It determines the pulse width of the output

waveform. An external voltage applied to this pin can also be used to modulate the output

waveform.

DISCHARGE

(Timer 0)

1

I

Open collector output which discharges a capacitor between intervals (in phase with output).

It toggles the output from high to low when voltage reaches 2/3 of supply voltage.

DISCHARGE

(Timer 1)

13

I

Open collector output which discharges a capacitor between intervals (in phase with output).

It toggles the output from high to low when voltage reaches 2/3 of supply voltage.

GND

7

O

Ground reference voltage

OUTPUT

(Timer 0)

5

O

Output driven waveform

OUTPUT

(Timer 1)

9

O

Output driven waveform

RESET

(Timer 0)

4

I

Negative pulse applied to this pin to disable or reset the timer. When not used for reset

purposes, it should be connected to Vcc to avoid false triggering.

RESET

(Timer 1)

10

I

Negative pulse applied to this pin to disable or reset the timer. When not used for reset

purposes, it should be connected to Vcc to avoid false triggering.

THRESHOLD

(Timer 0)

2

I

amplitude of voltage applied to this terminal is responsible for the set state of the flip-flop.

TRIGGER

(Timer 0)

6

I

Responsible for transition of the flip-flop from set to reset. The output of the timer depends

on the amplitude of the external trigger pulse applied to this pin.

THRESHOLD

(Timer 1)

12

I

amplitude of voltage applied to this terminal is responsible for the set state of the flip-flop.

TRIGGER

(Timer 1)

8

I

Responsible for transition of the flip-flop from set to reset. The output of the timer depends

on the amplitude of the external trigger pulse applied to this pin.

VCC

14

I

Supply voltage with respect to GND