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MDT90P01 Datasheet(PDF) 7 Page - Micon Design Technology Corporation |
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MDT90P01 Datasheet(HTML) 7 Page - Micon Design Technology Corporation |
7 / 11 page MDT90P01 This specification is subject to be changed without notice. Please visit our web site for the most updated information. http://www.mdtic.com.tw P. 7 2009/6 Ver. 1.1 Watchdog Timer control Watchdog timer disable all the time Watchdog timer enable all the time Power Edge Detect PED Disable PED Enable Security state Security Disable Security Enable The default security state of EPROM is weak disable. Once the IC was set to enable or disable, it’s forbidden to change. (B) Program Memory Address Description 000-1FF Program memory 000 The starting address of power on , pin change or WDT time-out reset. 9. Reset Condition for all Registers Register Address Power-On Reset WDT Reset CPIOB - - 1111 1111 TMRH - - 1111 1111 TMRL - - 1111 1111 RTCCL 01h xxxx uuuu PC 02h 0000 0000 STATUSL 03h 1xx1 #uu# STATUSH 04h 0000 0000 IODS 05h 0000 0000 PORT B 06h xxxx uuuu RTCCH 07h xxxx uuuu Note : u=unchanged, x=unknown, - =unimplemented, read as “0” #=value depends on the condition of the following table |
Similar Part No. - MDT90P01_09 |
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Similar Description - MDT90P01_09 |
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