MDT10P257

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P.

5

2011/02

VER 1.1

(9) TMR (Time Mode Register)

Bit

Symbol

Function

Prescaler Value

RTCC rate

WDT rate

2—0

PS2—0

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

1 1 1

1 : 2

1 : 4

1 : 8

1 : 16

1 : 32

1 : 64

1 : 128

1 : 256

1 : 1

1 : 2

1 : 4

1 : 8

1 : 16

1 : 32

1 : 64

1 : 128

3

PSC

Prescaler assignment bit :

0 — RTCC

1 — Watchdog Timer

4

TCE

RTCC signal Edge :

0 — Increment on low-to-high transition on RTCC pin

1 — Increment on high-to-low transition on RTCC pin

5

TCS

RTCC signal set :

0 — Internal instruction cycle clock

1 — Transition on RTCC pin

6

PHEN

Global Pull High Enable set :

0 — Enable weak internal Pull High

1 — Disable weak internal Pull High

This bit will be ignored if the “I/O pull-hi” is disable in user

option.

7

WDTEN

Watchdog timer Enable set :

0 — Enable WDT

1 — Disable WDT

(10) CPIO A, CPIO B, CPIO C (Control Port I/O Mode Register)

The CPIO register is “write-only”

＝

“0”, I/O pin in output mode;

＝

“1”, I/O pin in input mode.

(11) Set Pull hi mode

The Pull hi register is “write-only”

＝

“0”, Disable I/O pin Pull hi

＝

“1”, Enable I/O pin Pull hi

Do the CPIO instructions twice within three instructions on the same I/O port, then

the second CPIO instruction will set the corresponding pull-hi of I/O pins to enable

when global pull high Enable.

Correct instruction sequence to enable pull-high

Ex1:

LDWI 0FFH

CPIO 06H

←First：set PortB I/O

LDWI 0FH

←Second