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M38748M9F-XXXGP Datasheet(PDF) 11 Page - Mitsubishi Electric Semiconductor |
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M38748M9F-XXXGP Datasheet(HTML) 11 Page - Mitsubishi Electric Semiconductor |
11 / 92 page 11 3874 Group SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER MITSUBISHI MICROCOMPUTERS FUNCTIONAL DESCRIPTION CENTRAL PROCESSING UNIT (CPU) The 3874 group uses the standard 740 Family instruction set. Re- fer to the table of 740 Family addressing modes and machine instructions or the 740 Family Software Manual for details on the instruction set. Machine-resident 740 Family instructions are as follows: The FST and SLW instructions cannot be used. The STP, WIT, MUL, and DIV instructions can be used. [CPU Mode Register (CPUM)] 003B16 The CPU mode register contains the stack page selection bit and the internal system clock selection bit etc. The CPU mode register is allocated at address 003B16. Fig. 8 Structure of CPU mode register CPU mode register (CPUM : address 003B16) b7 b0 Stack page selection bit 0 : Page 0 1 : Page 1 XCOUT drivability selection bit 0 : Low drive 1 : High drive Processor mode bits b1 b0 0 0 : Single-chip mode 0 1 : 1 0 : Not available 1 1 : Port XC switch bit 0 : I/O port function 1 : XCIN–XCOUT oscillating function Main clock (X IN–XOUT) stop bit 0 : Oscillating 1 : Stopped Main clock division ratio selection bits b7 b6 0 0 : φ = f(XIN)/2 (high-speed mode) 0 1 : φ = f(XIN)/8 (middle-speed mode) 1 0 : φ = f(XCIN)/2 (low-speed mode) 1 1 : φ = f(XIN) (double-speed mode) Note: When setting b7 to b3, refer to notes of Figure 71. |
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