M1040 Datasheet Rev 0.1

3 of 12

Revised 11Nov2003

Integ r ated Circuit Systems , Inc. ● Comm unications Modules ● www.i cst. com ● tel (508) 852-5400

M1040

Preliminar y In f o r m atio n

Integrated

Circuit

Systems, Inc.

Figure 3: Detailed Block Diagram

M and R Divider Look-Up Tables (LUT)

divider values M and R to enable adjustment of loop

bandwidth and jitter tolerance. The look-up is defined in

Table 3.

M1040 M/R Divider LUT

Table 3

provides example Fin and phase detector

frequencies with 155.52MHz VCSO devices

(e.g., M1040-11-155.5200). See “Ordering Information”

on pg. 12

.

General Guidelines for M and R Divider Selection

General guidelines for M/R divider selection (see

following pages for more detail):

loop timing applications to assure PLL tracking,

especially during GR-253 jitter tolerance testing. The

recommended maximum phase detector frequency

not be used during loop timing mode.

overly sensitive, and higher phase detector

output for clock fault detection.

Post-PLL Divider

The M1040 also features a post-PLL (P) divider for the

output clocks. It divides the VCSO frequency to produce

one of two selectable output frequencies (1/2 or 1/1 of

the VCSO frequency). That selected frequency appears

value for the P divider.

Phase

Locked

Loop

(PLL)

M1040

SAW Delay Line

Phase

Shifter

VCSO

C

POST

C

POST

VC

nVC

R

POST

nOP_OUT

OP_OUT

R

POST

R

LOOP

R

LOOP

C

LOOP

C

LOOP

OP_IN

nOP_IN

PLL

Phase

Detector

Loop Filter

Amplifier

External

Loop Filter

Components

MR_SEL2:0

R

Divider

MUX

0

REF_SEL

DIF_REF0

nDIF_REF0

1

M Divider

FOUT0

nFOUT0

P Divider

P_SEL

NBW

R

IN

R

IN

M / R Divider

LUT

DIF_REF1

nDIF_REF1

Auto

Ref Sel

0

1

LOL

Phase

Detector

REF_ACK

AUTO

INIT

LOL

FOUT1

nFOUT1

3

MR_SEL3:0

M Div R Div

Total

PLL

Ratio

Fin for

155.52MHz

VCSO (MHz)

Phase Det.

Freq. for

155.52MHz

VCSO (MHz)

0 0 0

8

1

8

19.44

19.44

0 0 1

64

8

8

19.44

2.43

0 1 0

2

1

2

77.76

77.76

0 1 1

16

8

2

77.76

9.72

1 0 0

1

1

1

155.52

155.52

1 0 1

8

8

1

155.52

19.44

1 1 0

Note 1: Factory test mode; do not use.

N/A

N/A

N/A

1 1 1

2

8

0.25

622.08

77.76

Table 3: M1040 M/R Divider LUT

P_SEL

P Value

M1040-11-155.52

Output Frequency

(MHz)

1

2

77.76

0

1

155.52

Table 4: P Divider Selector Values and Frequencies