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SC16C754IA68 Datasheet(PDF) 5 Page - NXP Semiconductors |
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SC16C754IA68 Datasheet(HTML) 5 Page - NXP Semiconductors |
5 / 49 page Philips Semiconductors SC16C754 Quad UART with 64-byte FIFO Product data Rev. 04 — 19 June 2003 5 of 49 9397 750 11618 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. 5.2 Pin description Fig 3. PLCC68 pin configuration. handbook, full pagewidth SC16C754IA68 002aaa367 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 DSRA CTSA DTRA VCC RTSA INTA CSA TXA IOW TXB CSB INTB RTSB GND DTRB CTSB DSRB DSRD CDSD DTRD GND RTSD INTD CSD TXD IOR TXC CSC INTC RTSC VCC DTRC CTSC DSRC 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 Table 2: Pin description Symbol Pin Type Description LQFP80 PLCC68 A0 30 34 I Address 0 select bit. Internal registers address selection. A1 29 33 I Address 1 select bit. Internal registers address selection. A2 28 32 I Address 2 select bit. Internal registers address selection. CDA, CDB, CDC, CDD 79, 23, 39, 63 9, 27, 43, 61 I Carrier Detect (Active-LOW). These inputs are associated with individual UART channels A through D. A logic LOW on these pins indicates that a carrier has been detected by the modem for that channel. The state of these inputs is reflected in the modem status register (MSR). |
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