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TLV320AIC3109-Q1 Datasheet(PDF) 8 Page - Texas Instruments

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Part # TLV320AIC3109-Q1
Description  Automotive, Low-Power, 96-kHz, Mono Audio Codec
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TLV320AIC3109-Q1 Datasheet(HTML) 8 Page - Texas Instruments

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8
TLV320AIC3109-Q1
SLASE93 – AUGUST 2017
www.ti.com
Product Folder Links: TLV320AIC3109-Q1
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Copyright © 2017, Texas Instruments Incorporated
Electrical Characteristics (continued)
at 25°C, AVDD = DRVDD = IOVDD = 3.3 V, DVDD = 1.8 V, fS = 48 kHz, and 16-bit audio data (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
(4)
Ratio of output level with a 1-kHz, full-scale input to the output level playing an all-zero signal, measured A-weighted over a 20-Hz to
20-kHz bandwidth.
AUDIO DAC, SINGLE-ENDED HEADPHONE OUTPUT (RLOAD = 16 Ω)
Full-scale output voltage
0-dB input full-scale signal, output common-mode
setting = 1.35 V, output volume control = 0 dB
0.707
VRMS
SNR
Signal-to-noise ratio
A-weighted, fS = 48 kHz, output volume control =
0 dB, no input signal, referenced to full-scale input
level
96
dB
A-weighted, fS = 48 kHz, output volume control =
0 dB, no input signal, referenced to full-scale input
level, 50% DAC current-boost mode
97
DR
Dynamic range
A-weighted, fS = 48 kHz, –60-dB input full-scale
signal, output volume control = 0 dB, output
common-mode setting = 1.35 V
91
dB
THD
Total harmonic distortion
fS = 48 kHz, 0-dB input full-scale signal, output
volume control = 0 dB, output common-mode
setting = 1.35 V
–71
–65
dB
PSRR
Power-supply rejection ratio
217-Hz signal applied to DRVDD, AVDD
43
dB
1-kHz signal applied to DRVDD, AVDD
41
DAC gain error
0-dB, 1-kHz input full-scale signal; output volume
control = 0 dB; output common-mode setting =
1.35 V; fS = 48 kHz
–0.85
dB
DAC DIGITAL INTERPOLATION FILTER (fS = 48 kHz)
Pass band
0
0.45 fS
Hz
Pass-band ripple
±0.06
dB
Transition band
0.45 fS
0.55 fS
Hz
Stop band
0.55 fS
7.5 fS
Hz
Stop-band attenuation
65
dB
Group delay
21 / fS
s
MONO HEADPHONE DRIVER (AC-Coupled Output Configuration (3))
0-dB full-scale output voltage
0-dB gain to high-power outputs, output common-
mode voltage setting = 1.35 V
0.707
VRMS
Programmable output common-
mode voltage (applicable to line
outputs also)
First option
1.35
V
Second option
1.5
Third option
1.65
Fourth option
1.8
Maximum programmable output
level control gain
9
dB
Programmable output level
control gain step size
1
dB
PO
Maximum output power
RL = 32 Ω
15
mW
RL = 16 Ω
30
SNR
Signal-to-noise ratio(4)
A-weighted
94
dB


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