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STP5950 Datasheet(PDF) 1 Page - Stanson Technology

Part No. STP5950
Description  P Channel Enhancement Mode MOSFET
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Maker  STANSON [Stanson Technology]
Homepage  http://www.stansontech.com
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STP5950
P Channel Enhancement Mode MOSFET
-35.0A
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
www.stansontech.com
Copyright © 2009, Stanson Corp.
STP5950 2016 V1
DESCRIPTION
STP5950 is the P-Channel logic enhancement mode power field effect transistor which
is produced using high cell density, DMOS trench technology.
This high density process is especially tailored to minimize on-state resistance.
These device is particularly suited for low voltage application, notebook computer
power management and other battery circuits where high-side switching.
PIN CONFIGURATION
ABSOULTE MAXIMUM RATINGS (Ta = 25℃ Unless otherwise noted )
Parameter
Symbol
Typical
Unit
Drain-Source Voltage
VDSS
-100
V
Gate-Source Voltage
VGSS
±20
V
Continuous Drain Current
(TJ=150℃)
TA=25℃
TA=80℃
ID
-35.0
-33.0
A
Pulsed Drain Current
IDM
-140
A
Power Dissipation
TA=25℃
PD
140
W
Operation Junction Temperature
TJ
-55/150
Storgae Temperature Range
TSTG
-55/150
Thermal Resistance-Junction to Ambient
RθJA
62
/W
FEATURE
l
-100V/-15A, RDS(ON) = 36mΩ (Typ.)
@VGS = -10V
l
-100V/-10A, RDS(ON) = 40mΩ
@VGS = -4.5V
l
Super high density cell design for
extremely low RDS(ON)
l
Exceptional on-resistance and
maximum DC current capability
l
TO-220 package design




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