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ZSSC3170EE2T Datasheet(PDF) 10 Page - Integrated Device Technology |
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ZSSC3170EE2T Datasheet(HTML) 10 Page - Integrated Device Technology |
10 / 30 page ZSSC3170 Datasheet © 2016 Integrated Device Technology, Inc. 10 May 30, 2016 No. Parameter Symbol Conditions Min Typ Max Unit 1.3.7.17 Duty Cycle 4 D4 THRec(min) = 0.389 * VB; THDom(min) = 0.251 * VB; VB = 7.6 to 18V; tBit = 96µs; D4 = tBUS_rec(max)/(2 * tBit) (See ZSSC3170 LIN Interface Description for details.) 0.590 - 1.3.8 System Response 1.3.8.1 Start-Up Time 1) tSTART Until first valid output; fOSC = 2MHz 30 ms 1.3.8.2 Response Time LIN_Mode; Typical LIN Configuration 4) tRESP_ LIN_2_14_5 fOSC = 2.2MHz; 14-bit resolution; LIN Mode; 100% final value (see Table 2.5) 3.6 ms 1.3.8.3 Response Time PWM Mode; Typical PWM Configuration 5) tRESP_ PWM_2_14_2 fOSC = 1.8MHz; 14-bit resolution; PWM Mode; 100% final value (see Table 2.4) 20 ms 1.3.8.4 Overall Error AFE 6), 7) (fOSC = 2MHz, XZC off; no sensor related errors; relative to digital value) FAFE_85 TAMB: -20°C to 85°C 0.25 %FS FAFE_125 TAMB: -40°C to 125°C 0.5 %FS FAFE_150 TAMB: -40°C to 150°C 1.0 %FS 1) No measurement in mass production; parameter is guaranteed by design and/or quality observation. 2) In PWM Mode with Low-Side Switch (LSS) and PWM Mode with High-Side Switch (HSS), the sensor connection check (SCC) and the sensor short check (SSC) diagnostics are available only for ZSSC3170 silicon revision “F” and any subsequent revisions 3) For complete specification, see the ZSSC3170 LIN Interface Description. 4) 2-step A/D conversion (ADCORD=1), 14-bit resolution (ADCRES=1), resolution 2nd conversion step 5-bit (ADCMODE=11) 5) 2-step A/D conversion (ADCORD=1), 14-bit resolution (ADCRES=1), resolution 2nd conversion step 2-bit (ADCMODE=00) 6) Deviation from ideal line including INL, gain, offset, and temperature errors. 7) With XZC active: additional total error of max. 25ppm/K at XZC = 31. Error decreases linearly at XZC < 31. |
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