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X9241AMSI Datasheet(PDF) 7 Page - Xicor Inc. |
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X9241AMSI Datasheet(HTML) 7 Page - Xicor Inc. |
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7 / 18 page  X9241A Characteristics subject to change without notice. 7 of 18 REV 1.1.13 12/09/02 www.xicor.com Figure 7. Acknowledge Response from Receiver SCL from Data Output from Transmitter 1 89 START Acknowledge Master Data Output from Receiver DETAILED OPERATION All four XDCP potentiometers share the serial interface and share a common architecture. Each potentiometer is comprised of a resistor array, a Wiper Counter Register and four Data Registers. A detailed discussion of the register organization and array operation follows. Wiper Counter Register The X9241A contains four volatile Wiper Counter Registers (WCR), one for each XDCP potentiometer. The WCR can be envisioned as a 6-bit parallel and serial load counter with its outputs decoded to select one of sixty-four switches along its resistor array. The contents of the WCR can be altered in four ways: it may be written directly by the host via the Write WCR instruction (serial load); it may be written indirectly by transferring the contents of one of four associated Data Registers via the XFR Data Register instruction (parallel load); it can be modified one step at a time by the increment/decrement instruction; finally, it is loaded with the contents of its Data Register zero (DR0) upon power-up. The WCR is a volatile register; that is, its contents are lost when the X9241A is powered-down. Although the register is automatically loaded with the value in DR0 upon power-up, it should be noted this may be different from the value present at power-down. Data Registers Each potentiometer has four nonvolatile Data Registers. These can be read or written directly by the host and data can be transferred between any of the four Data Registers and the WCR. It should be noted all operations changing data in one of these registers is a nonvolatile operation and will take a maximum of 10ms. If the application does not require storage of multiple settings for the potentiometer, these registers can be used as regular memory locations that could possibly store system parameters or user preference data. |
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