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X9269UV24I-2.7 Datasheet(PDF) 1 Page - Xicor Inc. |
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X9269UV24I-2.7 Datasheet(HTML) 1 Page - Xicor Inc. |
1 / 25 page REV 1.1.11 2/17/03 Characteristics subject to change without notice. 1 of 25 www.xicor.com X9269 Dual Digitally-Controlled (XDCPTM) Potentiometers FEATURES • Dual–Two separate potentiometers • 256 resistor taps/pot–0.4% resolution • 2-Wire Serial Interface for write, read, and transfer operations of the potentiometer single supply device • Wiper Resistance, 100 Ω typical VCC = 5V • 4 Nonvolatile Data Registers for Each Potentiometer • Nonvolatile Storage of Multiple Wiper Positions • Power On Recall. Loads Saved Wiper Position on Power Up. • Standby Current < 5µA Max • 50K Ω, 100KΩ versions of End to End Pot Resistance • 100 yr. Data Retention • Endurance: 100,000 Data Changes per Bit per Register • 24-Lead SOIC, 16-Lead CSP (Chip Scale Pack- age), 24-Lead TSSOP • Low Power CMOS • Power Supply VCC = 2.7V to 5.5V DESCRIPTION The X9269 integrates 2 digitally controlled potentiometer (XDCP) on a monolithic CMOS integrated circuit. The digital controlled potentiometer is implemented using 255 resistive elements in a series array. Between each element are tap points connected to the wiper terminal through switches. The position of the wiper on the array is controlled by the user through the 2-Wire bus interface. Each potentiometer has associated with it a volatile Wiper Counter Register (WCR) and a four nonvolatile Data Registers that can be directly written to and read by the user. The contents of the WCR controls the position of the wiper on the resistor array though the switches. Powerup recalls the contents of the default Data Register (DR0) to the WCR. The XDCP can be used as a three-terminal potentiometer or as a two terminal variable resistor in a wide variety of applications including control, parameter adjustments, and signal processing. Single Supply / Low Power / 256-tap / 2-Wire bus APPLICATION NOTES AND DEVELOPMENT SYSTEM A V A I L A B L E AN99 • AN115 • AN124 •AN133 • AN134 • AN135 FUNCTIONAL DIAGRAM RH0 RL0 RW0 VCC VSS 2-Wire Bus 50K Ω or 100KΩ versions RH1 RL1 RW1 Power On Recall Wiper Counter Registers (WCR) Data Registers (DR0–DR3) Interface Bus Interface and Control Address Data Status Write Read Transfer Inc/Dec Control |
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