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X46402V8-2.9 Datasheet(PDF) 1 Page - Xicor Inc. |
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X46402V8-2.9 Datasheet(HTML) 1 Page - Xicor Inc. |
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1 / 23 page  ©Xicor, Inc. 1994, 1995, 1996, 1998 Patents Pending 9900-3003 5 1/11/00 CM 1 Characteristics subject to change without notice Preliminary Information 64K X46402 Functional Diagram Command Decode and Control Logic HV Generation Timing and Control Y Decoder Data Register Write Control WP SCL SDA Vcc V2FAIL (Vcc) Control Signal V2MON RESET Password Logic Write Password Area (64, 128, 256, 512, 2K, 4K, All, None) (Bytes) POWER ON AND GENERATION V2TRIP + - RESET LOW VOLTAGE VTRIP + - RESET & WATCHDOG TIMEBASE Control WATCHDOG TIMER RESET OTP array 1 Passwords No Password Area OTP array 2 Dual Voltage CPU Supervisor with 64K Password Protected EEPROM FEATURES • Dual Voltage Detection and Reset Assertion —Low Vcc Monitor —Low V2MON Monitor —Low Vcc Block of EEPROM Writes —RESET Signal Valid down to Vcc=1V • Selectable Watchdog Timer —150ms, 450ms, 1s, 5s, 10s, 20s, 1min, OFF • Volatile Flag shows Watchdog/Low Voltage Reset • 64kbit 2-wire Serial EEPROM —1MHz Serial Interface speed —64-Byte Page Write Mode • Two 64-Byte OTP memory blocks —Requires 64-bit OTP password to write • Adjustable size Password Protected Array —64 Bit Read and Write Array Passwords —Non-password protected array area • 8 count tamper counter for invalid passwords • Operates at 2.5-3.7V • 8L TSSOP package DESCRIPTION The X46402 combines several functions into one device. The first is a dual voltage CPU supervisor plus 64Kbit serial EEPROM memory with password protected write and read operations. The size of the password protected area is selectable by 3 control bits. A Write Protect (WP) pin in conjunction with a WPEN bit provides hardware OTP control of the configuration of the array. Password protected areas require 64 bit read or write passwords prior to access. The eighth illegal password entry (regardless of the number of correct entries) sets an OTP tamper bit. This bit is one of the 32 bits in the Device ID. A secondary voltage monitor circuit activates a V2FAIL pin when the secondary supply voltage drops below a V2trip voltage. This circuit is primarily intended to detect the immediate loss of the battery supply. A low Vcc voltage detect circuit activates a RESET pin when Vcc drops below a VTRIP voltage. This signal also blocks read or write operations. A watchdog timer with the time period controlled by three bits provides several possible time out periods from 150ms to 1 minute. |
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