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Z8530 Datasheet(PDF) 91 Page - Zilog, Inc. |
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Z8530 Datasheet(HTML) 91 Page - Zilog, Inc. |
91 / 317 page SCC™/ESCC™ User’s Manual Data Communication Modes 4-16 4.3 BYTE-ORIENTED SYNCHRONOUS MODE (Continued) Table 4-7. Enabling and Disabling CRC Direction of Data Coming into SCC Shift Register Delay Register CRC Notes H G F E D C B H G F E D C H G F E D C CPU Read CPU Enables CR H G F E D CPU Read H G F E CPU Read CPU Disables CR H G F CPU Read CPU Enables CR H G CPU Read H CPU Reads & Disca Read RR1 D Read H & Disca Ad d B Bd C D E F G H C D* E F G B C D E F e e d e e H G e H CRC Calc on B CRC Calc on C CRC Calc is Disabled on D CRC Calc on E CRC Calc on F CRC Calc on F Result latched in Error FIFO † * Usually D is a end-of-message character indicator. † The status is latched on the Error FIFO for each received byte. In the calculation of F, the CRC error flag in the Error FIFO will be 0 for an error free message. d = disabled e = enabled A B C D E F G H A = SYNC B - F = Data with E = CRC1 and F = CRC2 G and H are arbitrary data (Pad Character) Legend: A Note: No CRC Calculation on "D" (Sync) B (Data1) C (Data2) D (Data3) E (CRC1) F (CRC2) G (Data) H (Data) Stage 1 2 3 4 5 Receive Data FIFO UM010901-0601 |
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