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Z8530 Datasheet(PDF) 48 Page - Zilog, Inc. |
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Z8530 Datasheet(HTML) 48 Page - Zilog, Inc. |
48 / 317 page SCC™/ESCC™ User’s Manual Interfacing the SCC/ESCC 2-29 2 An example flowchart for processing an end of packet is shown in Figure 2-22. The chart includes the differences in processing between the ESCC and NMOS/CMOS version. In this chart, Tx IP and Underrun/EOM INT can be processed by interrupts or by polling the registers. Note that this flowchart does not have the procedures for interrupt handling, such as saving/restoring of registers to be used in the ISR (Interrupt Service Routine), Reset IUS command, or return from interrupt sequence. Figure 2-21. Operation of TBE, Tx Underrun/EOM and TxIP on ESCC TBE Tx Underrun /EOM Last Data -1 Last Data CRC1 CRC2 Flag TxIP Indicating CRC get loaded Reset Tx Underrun/EOM Latch Command If TxIP Reset Command NOT Issued TxIP Reset Command to Clear Tx Interrupt Data can be written to Tx FIFO after this point When Auto EOM Reset has enabled Set if Tx FIFO is Empty UM010901-06 01 |
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