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Z8530 Datasheet(PDF) 56 Page - Zilog, Inc.

Part # Z8530
Description  The Zilog SCC Serial Communication Controller
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Manufacturer  ZILOG [Zilog, Inc.]
Direct Link  http://www.zilog.com
Logo ZILOG - Zilog, Inc.

Z8530 Datasheet(HTML) 56 Page - Zilog, Inc.

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SCC™/ESCC™ User’s Manual
Interfacing the SCC/ESCC
2-37
2
With only one exception, the /REQ pin directly follows the
state of the transmit buffer (for the ESCC as programmed
by WR7' D5) in this mode. The SCC generates only one
falling edge on /REQ per character requested and the tim-
ing for this is shown in Figure 2-29.
The one exception occurs in synchronous modes at the
end of a CRC transmission. At the end of a CRC transmis-
sion, when the closing flag or sync character is loaded into
the Transmit Shift Register, /REQ is pulsed High for one
PCLK cycle. The DMA uses this falling edge on /REQ to
write the first character of the next frame to the SCC. In the
case of the Z80X30, /REQ goes High in response to the
falling edge of DS, but only if the appropriate channel
transmit buffer in the SCC is accessed. This is shown in
Figure 2-25. In the case of the Z85X30, /REQ goes High in
response to the falling edge of /WR, but only when the ap-
propriate channel transmit buffer in the SCC is accessed.
This is shown in Figure 2-30.
Figure 2-29. Z80X30 Transmit Request Release
/DS
/REQ
(/DTR//REQ)
PCLK
/REQ
(/W//REQ)
/AS
AD7-AD0
Transmit Data
WR8
Figure 2-30. Z85X30 Transmit Request Release
/REQ
(/DTR//REQ)
PCLK
/REQ
(/W//REQ)
D7-D0
Transmit Data
/WR
UM010901-06
01


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