preliminary

preliminary

BATTERY-BUFFERED HALL MULTITURN ENCODER

Rev B3, Page 4/33

PACKAGING INFORMATION

PIN CONFIGURATION

QFN16 4 mm x 4 mm (top view)

1

2

16

15

14

13

12

11

10

9

8

7

6

5

4

3

<D-CODE>

<A-CODE>

<P-CODE>

PIN FUNCTIONS

No. Name

Function

1 SEL

Low: Battery buffered counter with serial read-out

High: 3 bit parallel complementary output

2 PRE

Preset Trigger Input

3 NERR

Error Output (active low)

4 SDA

5 GND

Ground

6 VBAT

Battery Supply Voltage Input

(typ. 3.6 V)

7 VDDS

Switched Supply Voltage Output

8 VDD

+3.0 V to 5.5 V Main Supply Voltage

Input

9 N2

Parallel Output Bit 2 (negative logic),

Incremental Output B

10 P2

Parallel Output Bit 2 (positive logic),

Incremental Output A

11 N0

Parallel Output Bit 0 (negative logic)

12 NWRN

Battery Warning Output (active low)

13 DO_P0 Multiturn Interface, Data Output,

Parallel Output Bit 0 (positive logic)

14 CLK_N1 Multiturn Interface, Clock Line,

Parallel Output Bit 1 (negative logic)

15 DI_P1

Multiturn Interface, Data Input,

Parallel Output Bit 1 (positive logic)

16 SCL

BP

IC top marking: <P-CODE> = product code, <A-CODE> = assembly code (subject to changes);

1) Do not leave pin open.

2) Connecting the backside paddle is recommended by a single link to GND. A current flow across the paddle is not permissible.