CY7C66013
CY7C66113
Document #: 38-08024 Rev. *A
Page 5 of 58
LIST OF TABLES
Table 4-1. Pin Assignments .................................................................................................................. 11
Table 4-2. I/O Register Summary ......................................................................................................... 11
Table 4-3. Instruction Set Summary ..................................................................................................... 13
Table 9-1. GPIO Port Output Control Truth Table and Interrupt Polarity .............................................. 21
Table 12-1. HAPI Port Configuration .................................................................................................... 25
Table 12-2. I2C Port Configuration ........................................................................................................ 25
Table 13-1. I2C Status and Control Register Bit Definitions .................................................................. 26
Table 14-1. Port 2 Pin and HAPI Configuration Bit Definitions ............................................................. 27
Table 16-1. Interrupt Vector Assignments ............................................................................................ 31
Table 18-1. Control Bit Definition for Downstream Ports ...................................................................... 36
Table 18-2. Control Bit Definition for Upstream Port ............................................................................ 39
Table 19-1. Memory Allocation for Endpoints ..................................................................................... 40
Table 20-1. USB Register Mode Encoding ........................................................................................... 44
Table 20-2. Decode Table for Table 20-3: “Details of Modes for Differing Traffic Conditions” ............. 45
Table 20-3. Details of Modes for Differing Traffic Conditions (see Table 20-2 for the decode legend) 46
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