10

voltage driven beyond the supply rails. Although the device's

output will not change phase, the input's overvoltage should

be avoided. If an input voltage exceeds supply voltage by

more than 0.6V, electrostatic protection diodes placed in the

input stage of the device begin to conduct and overvoltage

damage could occur.

FIGURE 2. OPERATION WITH BEYOND-THE-RAILS INPUT

Power Dissipation

With the high-output drive capability of the EL5221 buffer, it

is possible to exceed the 125°C 'absolute-maximum junction

temperature' under certain load current conditions.

Therefore, it is important to calculate the maximum junction

temperature for the application to determine if load

conditions need to be modified for the buffer to remain in the

safe operating area.

The maximum power dissipation allowed in a package is

determined according to:

where:

Θ

The maximum power dissipation actually produced by an IC

is the total quiescent supply current times the total power

supply voltage, plus the power in the IC due to the loads, or:

when sourcing, and:

when sinking.

where:

i = 1 to 2 for dual buffer

Figure 4 provide a convenient way to see if the device will

overheat. The maximum safe power dissipation can be

found graphically, based on the package type and the

ambient temperature. By using the previous equation, it is a

derating curves. To ensure proper operation, it is important

to observe the recommended derating curves shown in

Figure 3 and Figure 4.

FIGURE 3. PACKAGE POWER DISSIPATION VS AMBIENT

TEMPERATURE

FIGURE 4. PACKAGE POWER DISSIPATION VS AMBIENT

TEMPERATURE

1V

1V

10µS

P

DMAX

T

Θ

JA

---------------------------------------------

=

P

DMAX

ΣiV

[

S

I

SMAX

V

(

- V

I

×

+

×

=

P

DMAX

ΣiV

[

S

I

SMAX

V

(

I

×

+

×]

=

Package Mounted on a JEDEC JESD51-7 High

Effective Thermal Conductivity Test Board

Ambient Temperature (°C)

0.6

0

1

0.8

0.4

0.2

50

150

100

0125

25

75 85

435mW

SOT2

3-6

230°

C/W

870mW

M

SO

P-8

11

5°C

/W

Ambient Temperature (°C)

Package Mounted on a JEDEC JESD51-3 Low

Effective Thermal Conductivity Test Board

0.2

0

0.6

0.5

0.1

50

150

100

0125

25

75 85

0.4

0.3

SO

T23

-6

256

°C/W

391mW

486mW

M

SO

P-8

20

6°C

/W

EL5221