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LT3420 Datasheet(PDF) 9 Page - Linear Technology |
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LT3420 Datasheet(HTML) 9 Page - Linear Technology |
9 / 20 page LT3420/LT3420-1 9 3420fa of Q1 so that the peak current of Q1 is 1.4A and the mini- mum secondary current is 40mA (typical values). The previously described charging cycle must be halted when the output voltage reaches the desired value. The LT3420 monitors the output voltage via the flyback pulse on the SW pin. When Q1 turns off, the secondary side conducts current turning on diode D1. Since the diode is conducting and the SEC pin is at nearly ground, the voltage across the secondary is nearly equal to VOUT. The voltage across the primary is therefore close to VOUT/N. A current proportional to VOUT/N flows through R1 and into the RFB pin. The current flows out of the RREF pin through a resis- tor creating a ground referred voltage. When this voltage exceeds an internal 1V reference voltage, the output of comparator A3 goes high which resets the master latch. The Q output of the master latch goes low, disabling the entire power delivery block and enabling the refresh timer. Leakage Spike Blanking Another function of the LT3420 is leakage spike blanking when the power switch, Q1, turns off. Right after Q1 turns off, a one-shot turns on Q2 for 200ns (typ). With Q2 on, comparator A3 is disabled. This function may prevent A3 from false tripping on the leakage inductance spike on the SW pin. In practice, the PNP transistor Q3 filters out the leakage spike. Refresh Timer When the refresh timer is enabled, a 2.5 µA current source is switched on, charging up the external timing capacitor, Figure 6b. Switching Waveforms with VOUT = 300V, VCC = VBAT = 3.3V Figure 6a. Switching Waveforms with VOUT = 100V, VCC = VBAT = 3.3V OPERATIO C3, from its initial voltage towards 1V. When the voltage on C3 reaches 1V, the polarity of the current source changes and 2.5 µA discharges C3. When the voltage on C3 reaches 0.5V, the refresh timer sends a set pulse to the master latch, which puts the LT3420 into the charging mode. Interface/Control The CHARGE pin serves two functions. The first is to enable or shutdown the part depending on the level of the pin (high = enable, low =shutdown). The second is to force the part into the charging mode (low →high transi- tion). The LT3420 also has a DONE pin, which signals whether or not the part is done charging the photoflash capacitor. The DONE pin is an open collector NPN switch (Q5) so an external pull-up resistor is needed. Whenever the part is in charging mode, DONE will be low. DONE will go high when the charging mode is complete. Both the CHARGE and DONE pins can be easily interfaced to a microprocessor in a digital or film camera. LT3420-1 Differences The LT3420-1 has different primary and secondary cur- rent limit levels. The primary current limit level of the LT3420-1 is 1A (typ) and the secondary current limit is 15mA (typ). The LT3420-1 has no leakage spike blanking which causes no problems since the PNP transistor, Q3, provides adequate filtering. Finally, the breakdown voltage of the SW pin of the LT3420-1 is higher at 50V. ISW 1A/DIV VSW 20V/DIV ISEC 200mA/DIV 2 µs/DIV 3420 F06a 2 µs/DIV 3420 F06b ISW 1A/DIV VSW 20V/DIV ISEC 200mA/DIV |
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