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LTC3830EGN Datasheet(PDF) 10 Page - Linear Technology |
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LTC3830EGN Datasheet(HTML) 10 Page - Linear Technology |
10 / 24 page 10 LTC3830/LTC3830-1 sn3830 3830fs The RDS(ON) of Q1 usually increases with temperature. To keep the current limit threshold constant, the internal 12 µA sink current at IMAX is designed with a positive temperature coefficient to provide first order correction for the temperature coefficient of RDS(ON)Q1. In order for the current limit circuit to operate properly and to obtain a reasonably accurate current limit threshold, the IIMAX and IFB pins must be Kelvin sensed at Q1’s drain and source pins. In addition, connect a 0.1 µF decoupling capacitor across RIMAX to filter switching noise. Other- wise, noise spikes or ringing at Q1’s source can cause the actual current limit to be greater than the desired current limit set point. Due to switching noise and variation of RDS(ON), the actual current limit trip point is not highly accurate. The current limiting circuitry is primarily meant to prevent damage to the power supply circuitry during fault conditions. The exact current level where the limiting circuit begins to take effect will vary from unit to unit as the RDS(ON) of Q1 varies. Typically, RDS(ON) varies as much as ±40% and with ±25% variation on the LTC3830’s IMAX current, this can give a ±65% variation on the current limit threshold. The RDS(ON) is high if the VGS applied to the MOSFET is low. This occurs during power up, when PVCC1 is ramping up. To prevent the high RDS(ON) from activating the current limit, the LTC3830 disables the current limit circuit if PVCC1 is less than 2.5V above VCC. To ensure proper operation of the current limit circuit, PVCC1 must be at least 2.5V above VCC when G1 is high. PVCC1 can go low when G1 is low, allowing the use of an external charge pump to power PVCC1. Oscillator Frequency The LTC3830 includes an onboard current controlled oscillator that typically free-runs at 200kHz. The oscillator frequency can be adjusted by forcing current into or out of the FREQSET pin. With the pin floating, the oscillator runs at about 200kHz. Every additional 1 µA of current into/out of the FREQSET pin decreases/increases the frequency by 10kHz. The pin is internally servoed to 1.265V, connecting a 50k resistor from FREQSET to ground forces 25 µA out of the pin, causing the internal oscillator to run at approxi- mately 450kHz. Forcing an external 10 µA current into FREQSET cuts the internal frequency to 100kHz. An inter- nal clamp prevents the oscillator from running slower than about 50kHz. Tying FREQSET to VCC forces the chip to run at this minimum speed. The LTC3830-1 and the 8-lead LTC3830 do not have this frequency adjustment function. Shutdown The LTC3830 includes a low power shutdown mode, controlled by the logic at the SHDN pin. A high at SHDN allows the part to operate normally. A low level at SHDN for more than 100 µs forces the LTC3830 into shutdown mode. In this mode, all internal switching stops, the COMP and SS pins pull to ground and Q1 and Q2 turn off. The LTC3830 supply current drops to <10 µA, although off- state leakage in the external MOSFETs may cause the total VIN current to be some what higher, especially at elevated temperatures. If SHDN returns high, the LTC3830 reruns a soft-start cycle and resumes normal operation. The LTC3830-1 does not have this shutdown function. External Clock Synchronization The LTC3830 SHDN pin doubles as an external clock input for applications that require a synchronized clock. An internal circuit forces the LTC3830 into external synchro- nization mode if a negative transition at the SHDN pin is detected. In this mode, every negative transition on the SHDN pin resets the internal oscillator and pulls the ramp signal low, this forces the LTC3830 internal oscillator to lock to the external clock frequency. The LTC3830-1 does not have this external synchronization function. APPLICATIO S I FOR ATIO + + 12 13 LTC3830 CC 12 µA 0.1 µF Q2 COUT 3830 F04 CIN VIN VOUT G2 IMAX RIMAX IFB 1k + – Q1 LO G1 Figure 4. Current Limit Setting |
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