MIC2588/MIC2594

Micrel

M9999-122303

10

December 2003

Functional Description

Hot Swap Insertion

When circuit boards are inserted into systems carrying live

supply voltages (“hot swapped”), high inrush currents often

result due to the charging of bulk capacitance that resides

across the circuit board’s supply pins. These current spikes

can cause the system’s supply voltages to temporarily go out

of regulation, causing data loss or system lock-up. In more

extreme cases, the transients occurring during a hot swap

event may cause permanent damage to connectors or on-

board components.

The MIC2588 and the MIC2594 are designed to address

these issues by limiting the magnitude of the transient current

during hot swap events. This is achieved by controlling the

rate at which power is applied to the circuit board (di/dt and

dv/dt management). In addition, to inrush current control, the

MIC2588 and the MIC2594 incorporate input voltage super-

visory functions and current limiting, thereby providing robust

protection for both the system and the circuit board.

Start-Up Cycle

When the input voltage to the IC is between the overvoltage

and undervoltage thresholds (MIC2588) or is greater than

V

GATE pin of the IC applies a constant charging current

(I

creates a Miller integrator out of the MOSFET circuit, which

limits the slew-rate of the voltage at the drain of M1. The drain

voltage rate-of-change (dv/dt) of M1 is:

dv M1

dt

I

C

–

I

C

DRAIN

GATE(–)

FDBK

GATEON

FDBK

()

=









=









where I

I

GATE(–)

≅ –I

due to the extremely high

transconductance values of power MOSFETs; and

IC

dv M1

dt

GATE(–)

FDBK

DRAIN

=×

()

Relating the above to the maximum transient current into the

load capacitance to be charged upon hot swap or power-up

involves a simple extension of the same formula:

I

Cdv M1

dt

IC

–

I

C

| I

|

CI

C

CHARGE

LOAD

DRAIN

CHARGE

LOAD

GATEON

FDBK

CHARGE

LOAD

GATEON

FDBK

=

×

()

=×









=

×

Transposing:

C

CI

| I

|

FDBK

LOAD

GATEON

CHARGE

=

×

(1)

C

surges which would otherwise be caused by (C

C

gate of M1. An appropriate value for C

mined using the formula for a capacitive voltage divider:

Maximum voltage on C

V

1. For a standard 10V enhancement N-Channel

MOSFET, V

2. Choose 3.5V as a safe maximum voltage to safely

avoid turn-on transients.

V

= [(V

V

CC

C

V

– V (min) – V

V

GATE

FDBK

D G(Q1)

DD

EE

G-S(M1)

G-S(M1)

=+

−

(2)

While the value for R

to allow a maximum of several milliamperes to flow in the

gate-drain circuit of M1 during turn-on. While the final value

for R

R

75V for (V

Resistor R4, in series with the MOSFETs gate, minimizes the

potential for parasitic high frequency oscillations from occur-

ring in M1. While the exact value of R4 is not critical,

commonly used values for R4 range from 10

Ω to 33Ω.

For example, let us assume a hot swap controller is required

to maintain the inrush current into a 150

µF load capacitance

at 1.7A maximum, and that this circuit may operate from

supply voltages as high as (V

to be used with the MIC2588/94 is an IRF540NS 100V

Calculating a value for C

C

150 F

45 A

1.7A

3.97nF

µ×

µ =

Good engineering practice suggests the use of the worst-

case parameter values for I

C

150 F

60 A

1.7A

5.3nF

µ× µ =

where the nearest standard 5% value is 5.6nF. Substituting

5.6nF into Equation 2 from above yields:

C

5.6nF

250pF

75V – 3.5V

3.5V

0.12 F

Finally, choosing R4 = 10

Ω and R

suitable, initial design for prototyping.