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PESD3V3L5UY Datasheet(PDF) 8 Page - NXP Semiconductors |
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PESD3V3L5UY Datasheet(HTML) 8 Page - NXP Semiconductors |
8 / 11 page 2004 Mar 23 8 Philips Semiconductors Product specification Low capacitance 5-fold ESD protection diode arrays in SOT363 package PESD3V3L5UY; PESD5V0L5UY APPLICATION INFORMATION The PESDxL5UY is designed for the uni-directional protection of up to five lines or bi-directional protection of four lines from the damage caused by Electrostatic Discharge (ESD) and surge pulses. The PESDxL5UY may be used on lines where the signal polarities are above or below ground. PESDxL5UY can withstand and provides protection from a surge of 25 watts peak pulse power per line for a 8/20 µs waveform. 001aaa216 PESDxL5UY GND high speed data lines Fig.9 Typical application for uni-directional protection of five lines. 001aaa214 PESDxL5UY GND high speed data lines Fig.10 Typical application for bi-directional protection of four lines. Circuit board layout and protection device placement Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT) and surge transients. The following guidelines are recommended: 1. The protection device should be placed as closely as possible to the input terminal or connector. 2. The path length between the protection device and the protected line should be as short as possible. 3. Parallel signal paths should be kept to a minimum. 4. Running protection conductors in parallel with unprotected conductor should be avoided. 5. All printed-circuit board conductive loops (including power and group loops) should be kept to a minimum. 6. The length of the transient return path to ground should be kept to a minimum. 7. The use of shared transient return paths to a common ground point should be avoided. 8. Ground planes should be used whenever possible. 9. For multilayer printed-circuit boards, ground vias should be used. |
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