PC107AMZFU100LC datasheet(7/50 Pages) ATMEL

Part #	PC107AMZFU100LC

Description	PCI Bridge Memory Controller

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Manufacturer	ATMEL [ATMEL Corporation]

Direct Link	http://www.atmel.com

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7

PC107A [Preliminary]

2137C–HIREL–03/04

RCS3

D7

Output

GV

DD

DRV_MEM_ADDR

SDBA0

A9

Output

GVDD

DRV_MEM_ADDR

(1)(2)

SDBA1

A8

Output

GV

DD

DRV_MEM_ADDR

SDCAS

D4

Output

GVDD

DRV_MEM_ADDR

(1)

SDMA[13–0]

E10, F9, D9, F8, E8, D8, B8, E7, C7,

B7, A7, B6, A6, A5

Output

GVDD

DRV_MEM_ADDR

(4)(5)

SDRAS

B4

Output

GVDD

DRV_MEM_ADDR

(1)

WE

A3

Output

GVDD

DRV_MEM_ADDR

EPIC Control Signals

INT

Y22

Output

OVDD

DRV_CPU

(16)

IRQ_0 / S_INT

U24

Input

OVDD

–

IRQ_1 / S_CLK

C24

I/O

OV

DD

DRV_PCI

IRQ_2 / S_RST

T21

I/O

OVDD

DRV_PCI

IRQ_3 / S_FRAME

U20

I/O

OVDD

DRV_PCI

IRQ_4/ L_INT

V22

I/O

OV

DD

DRV_PCI

Two-wire Interface Control Signals

SCL

AB25

I/O

OVDD

DRV_CPU

(8)(12)

SDA

AB24

I/O

OV

DD

DRV_CPU

(8)(12)

Clock Signals

CKO

V20

Output

OV

DD

DRV_PCI

CPU_CLK[0–2]

AA12, AA13, AB12

Output

BV

DD

DRV_MEM_ADDR

(4)

OSC_IN

U22

Input

OVDD

–

PCI_CLK[0–4]

R25, P24, R24, N24, N25

Output

OV

DD

DRV_MEM_ADDR

(4)

PCI_SYNC_IN

P20

Input

OV

DD

–

PCI_SYNC_OUT

P25

Output

OVDD

DRV_MEM_ADDR

SDRAM_CLK[0–3]

D14, D13, E12, E14

Output

GV

DD

DRV_MEM_ADDR

(4)

SDRAM_SYNC_IN

E13

Input

GV

DD

–

SDRAM_SYNC_OUT

D12

Output

GVDD

DRV_MEM_ADDR

Miscellaneous Signals

HRESET

AA23

Input

OV

DD

–

HRESET_CPU

AB21

Output

BVDD

DRV_CPU

(10)(12)

MCP

AE20

Output

OV

DD

DRV_CPU

(12)(16)

NMI

AC25

Input

OVDD

–

QACK

AE18

Output

BVDD

DRV_CPU

(10)

QREQ

M4

Input

BV

DD

–

SRESET

Y18

Output

BVDD

DRV_CPU

(10)

Table 1. PC107A Pinout Listing (Continued)

Signal Name

Package Pin Number

Pin Type

Supply

Voltage

Output Driver Type

Notes

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PC107AMZFU100LC Datasheet(PDF) 7 Page - ATMEL Corporation

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