U2739M

Rev. A1, 02-Nov-98

Preliminary Information

2 (4)

Interfaces

D Source decoder output interface: I2S and SPDIF

D Data decoder output interface: V24/RS232

D Channel decoder output interface: RDI and SFCO

D Microcontroller interface: I2C/L3

D RDI

–

Extended high capacity mode

–

IEC 958 format

–

RDI control channel (RCC)

D SFCO simple full capacity output

–

Window-, serial sub-channel identifier (SbChld)-,

data-, error- and clock line

–

3.072 MHz burst mode interface

D 10-bit ADC interface

–

ADC sampling clock generation

–

ADC binary or 2’s complement format selection

–

Support of several intermediate frequencies

D DSP OAK core bootstrap ROM interface

D Voltage controlled reference oscillator (VCXO) inter-

face

D Time deinterleaver SRAM (4 Mbit) interface

D High speed serial output HSSO (PAD, DD1, DD2,

CIR) interface, 3-line serial burst mode interface

Block Diagram

15004

Channel

decoder

Source

decoder

Data

decoder

RDI

interface

ADC

ROM

Tuner

DAC

I2S

SPDIF

V24/RS232

MC

interface

MCU

SFCO

RDI

RAM

U2739M

HSSO

Figure 1. TEMIC DAB receiver concept

Ordering Information

Extended Type Number

Package

Remarks

U2739M

TQFP100

U2739M

LQFP144

U2739M

QFP144