UCC2819, UCC3819

PROGRAMMABLE OUTPUT

POWER FACTOR PREREGULATOR

SLUS482B - APRIL 2001 − REVISED DECEMBER 2004

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pin descriptions (continued)

VAI: (voltage amplifier non-inverting input) This input can be tied to the VREF or any other voltage reference

(

≤7.5 V) to set the boost regulator output voltage.

VAOUT: (voltage amplifier output) This is the output of the operational amplifier that regulates output voltage.

The voltage amplifier output is internally limited to approximately 5.5 V to prevent overshoot.

VCC: (positive supply voltage) Connect to a stable source of at least 20 mA between 10 V and 17 V for normal

operation. Bypass VCC directly to GND to absorb supply current spikes required to charge external MOSFET

exceeds the upper under-voltage lockout voltage threshold and remains above the lower threshold.

pole external filter. At low line, the VFF roll should be 14 V.

VSENSE: (voltage amplifier inverting input) This is normally connected to a compensation network and to the

boost converter output through a divider network.

VREF: (voltage reference output) VREF is the output of an accurate 7.5-V voltage reference. This output is

capable of delivering 20 mA to peripheral circuitry and is internally short-circuit current limited. VREF is disabled

ceramic capacitor for best stability. Please refer to Figures 8 and 9 for VREF line and load regulation

characteristics.

APPLICATION INFORMATION

The UCC3819 is based on the UCC3818 PFC preregulator. For a more detailed application information for this

part, please refer to the UCC3818 datasheet product folder.

The main difference between the UCC3818 and the UCC3819 is that the non-inverting input of the voltage error

amplifier is made available to the user through an external pin (VAI) in the UCC3819. The SS pin and function

were eliminated to accommodate this change.

The benefit of VAI pin is that it can be used to dynamically change the PFC output voltage based on the line

voltage (RMS) level or other conditions. Figure 1 shows one suggested implementation of the tracking boost

PFC converter as this approach is sometimes referred to. The VAI pin is tied to the VFF pin and hence output

voltage scales up with the line voltage. The benefit of this approach is that at lower line voltages the output

voltage is lower and that leads to smaller boost inductor value, lower MOSFET conduction losses and reduced

component stresses. In order for this feature to work, the downstream converter has to operate over a wider

input range.