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WSF128K16-37G1UM Datasheet(PDF) 1 Page - List of Unclassifed Manufacturers |
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1 / 15 page 1 White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com WSF128K16-XXX May 2001 Rev. 5 128Kx16 SRAM/FLASH MODULE, SMD 5962-96900 FEATURES n Access Times of 35ns (SRAM) and 70ns (FLASH) n Access Times of 70ns (SRAM) and 120ns (FLASH) n Packaging • 66-pin, PGA Type, 1.075 inch square HIP, Hermetic Ceramic HIP (Package 400) • 66-pin, PGA Type, 1.185 inch square HIP, Hermetic Ceramic HIP (Package 401) • 68 lead, Hermetic CQFP (G1U), 22.4mm (0.880 inch) square (Package 519). Designed to fit JEDEC 68 lead 0.990” CQFJ footprint (Fig. 2) n 128Kx16 SRAM n 128Kx16 5V FLASH n Organized as 128Kx16 of SRAM and 128Kx16 of Flash Memory with separate Data Buses n Both blocks of memory are User Configurable as 256Kx8 n Low Power CMOS n Commercial, Industrial and Military Temperature Ranges n TTL Compatible Inputs and Outputs n Built-in Decoupling Caps and Multiple Ground Pins for Low Noise Operation n Weight • WSF128K16-XHX - 13 grams typical • WSF128K16-H1X - 13 grams typical • WSF128K16-XG1UX - 5 grams typical FLASH MEMORY FEATURES n 10,000 Erase/Program Cycles n Sector Architecture • 8 equal size sectors of 16K bytes each • Any combination of sectors can be concurrently erased. Also suppor ts full chip erase n 5 Volt Programming; 5V ± 10% Supply n Embedded Erase and Program Algorithms n Hardware Write Protection n Page Program Operation and Internal Program Control Time. Note: For programming information refer to Flash Programming 1M5 Application Note. BLOCK DIAGRAM PIN DESCRIPTION FD0-15 Flash Data Inputs/Outputs SD0-15 SRAM Data Inputs/Outputs A0-16 AddressInputs SWE1-2 SRAM Write Enable SCS1-2 SRAM Chip Selects OE Output Enable VCC Power Supply GND Ground NC Not Connected FWE1-2 Flash Write Enable FCS1-2 Flash Chip Select TOP VIEW FIG.1 PIN CONFIGURATION FOR WSF128K16-XHX AND WSF128K16-XH1X |
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