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ADCMP562 Datasheet(PDF) 10 Page - Analog Devices |
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ADCMP562 Datasheet(HTML) 10 Page - Analog Devices |
10 / 16 page ADCMP561/ADCMP562 Rev. A | Page 10 of 16 TIMING INFORMATION 50% 50% VREF ± VOS 50% DIFFERENTIAL INPUT VOLTAGE LATCH ENABLE Q OUTPUT Q OUTPUT LATCH ENABLE tH tPDL tPDH tPLOH tPLOL tR tF VIN VOD tS tPL Figure 18. System Timing Diagram Figure 18 shows the compare and latch features of the ADCMP561/ADCMP562. Table 4 describes the terms in the diagram. Table 4. Timing Descriptions Symbol Timing Description tPDH Input to Output High Delay Propagation delay measured from the time the input signal crosses the reference (± the input offset voltage) to the 50% point of an output low-to-high transition. tPDL Input to Output Low Delay Propagation delay measured from the time the input signal crosses the reference (± the input offset voltage) to the 50% point of an output high-to-low transition. tPLOH Latch Enable to Output High Delay Propagation delay measured from the 50% point of the latch enable signal low-to-high transition to the 50% point of an output low-to-high transition. tPLOL Latch Enable to Output Low Delay Propagation delay measured from the 50% point of the latch enable signal low-to-high transition to the 50% point of an output high-to-low transition. tH Minimum Hold Time Minimum time after the negative transition of the latch enable signal that the input signal must remain unchanged to be acquired and held at the outputs. tPL Minimum Latch Enable Pulse Width Minimum time the latch enable signal must be high to acquire an input signal change. tS Minimum Setup Time Minimum time before the negative transition of the latch enable signal that an input signal change must be present to be acquired and held at the outputs. tR Output Rise Time Amount of time required to transition from a low to a high output as measured at the 20% and 80% points. tF Output Fall Time Amount of time required to transition from a high to a low output as measured at the 20% and 80% points. VOD Voltage Overdrive Difference between the differential input and reference input voltages. |
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