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MPC92432 Datasheet(PDF) 2 Page - Motorola, Inc |
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MPC92432 Datasheet(HTML) 2 Page - Motorola, Inc |
2 / 20 page MPC92432 MOTOROLA 2 TIMING SOLUTIONS Figure 1. MPC92432 — Generic Logic Diagram Figure 2. 48-Lead Package Pinout (Top View) ÷P XTAL PLL ÷NB ÷NA ÷M fREF fVCO fQA fQB REF_CLK XTAL1 XTAL2 REF_SEL TEST_EN SDA SCL ADR[1:0] PLOAD M[9:0] NA[2:0] NB P CLK_STOPx BYPASS MR QA QB LOCK PLL Configuration Registers I2C Control It is recommended to use an external RC filter for the analog VCC_PLL supply pin. Please see the application section for details. 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 9 10 11 12 37 38 39 40 41 42 43 44 45 46 47 48 MPC92432 M9 M8 M7 M6 M5 GND M4 M3 M2 M1 M0 VCC GND NA2 NA1 NA0 PLOAD VCC MR SDA SCL ADR1 ADR0 P Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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