DTC114EET1 datasheet(1/10 Pages) ONSEMI

Part #	DTC114EET1

Description	Bias Resistor Transistor

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Manufacturer	ONSEMI [ON Semiconductor]

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January, 2005 − Rev. 6

1

Publication Order Number:

DTC114EET1/D

DTC114EET1 Series

Bias Resistor Transistor

NPN Silicon Surface Mount Transistor

with Monolithic Bias Resistor Network

This new series of digital transistors is designed to replace a single

device and its external resistor bias network. The BRT (Bias Resistor

Transistor) contains a single transistor with a monolithic bias network

consisting of two resistors; a series base resistor and a base−emitter

resistor. The BRT eliminates these individual components by

integrating them into a single device. The use of a BRT can reduce

both system cost and board space. The device is housed in the

SC−75/SOT−416 package which is designed for low power surface

mount applications.

Features

• Simplifies Circuit Design

• Reduces Board Space

• Reduces Component Count

• The SC−75/SOT−416 Package Can be Soldered Using Wave or

Reflow

• The Modified Gull−Winged Leads Absorb Thermal Stress During

Soldering Eliminating the Possibility of Damage to the Die

• Available in 8 mm, 7 inch/3000 Unit Tape & Reel

• Pb−Free Packages are Available

MAXIMUM RATINGS (TA = 25°C unless otherwise noted)

Rating

Symbol

Value

Unit

Collector-Base Voltage

VCBO

50

Vdc

Collector-Emitter Voltage

VCEO

50

Vdc

Collector Current

IC

100

mAdc

Maximum ratings are those values beyond which device damage can occur.

Maximum ratings applied to the device are individual stress limit values (not

normal operating conditions) and are not valid simultaneously. If these limits are

exceeded, device functional operation is not implied, damage may occur and

reliability may be affected.

THERMAL CHARACTERISTICS

Rating

Symbol

Value

Unit

Total Device Dissipation,

FR−4 Board (Note 1) @ TA = 25°C

Derate above 25

°C

PD

200

1.6

mW

mW/

°C

Thermal Resistance,

Junction−to−Ambient (Note 1)

RqJA

600

°C/W

Total Device Dissipation,

FR−4 Board (Note 2) @ TA = 25°C

Derate above 25

°C

PD

300

2.4

mW

mW/

°C

Thermal Resistance,

Junction−to−Ambient (Note 2)

RqJA

400

°C/W

Junction and Storage Temperature Range

TJ, Tstg

−55 to

+150

°C

1. FR−4 @ Minimum Pad

2. FR−4 @ 1.0

× 1.0 Inch Pad

NPN SILICON

BIAS RESISTOR TRANSISTORS

SC−75/SOT−416

CASE 463

STYLE 1

3

2

1

PIN 3

COLLECTOR

(OUTPUT)

PIN 2

EMITTER

(GROUND)

PIN 1

BASE

(INPUT)

R1

R2

xx = Specific Device Code

M = Date Code

MARKING

DIAGRAM

xx M

See detailed ordering, marking, and shipping information in

the package dimensions section on page 2 of this data sheet.

ORDERING INFORMATION

http://onsemi.com

Similar Part No. - DTC114EET1

Manufacturer	Part #	Datasheet	Description
ON Semiconductor	DTC114EET1	187Kb / 12P	NPN SILICON BIAS RESISTOR TRANSISTORS May, 2000 ??Rev. 0
	DTC114EET1	92Kb / 11P	Bias Resistor Transistor NPN Silicon Surface Mount Transistor with Monolithic Bias Resistor Network March, 2006 ??Rev. 8
	DTC114EET1	145Kb / 13P	Bias Resistor Transistor NPN Silicon Surface Mount Transistor with Monolithic Bias Resistor Network May, 2012 ??Rev. 12
	DTC114EET1G	92Kb / 11P	Bias Resistor Transistor NPN Silicon Surface Mount Transistor with Monolithic Bias Resistor Network March, 2006 ??Rev. 8
	DTC114EET1G	140Kb / 12P	Digital Transistors (BRT) R1 = 10 k, R2 = 10 k August, 2012 ??Rev. 4

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