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GLT44016-40J4 Datasheet(PDF) 4 Page - List of Unclassifed Manufacturers |
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GLT44016-40J4 Datasheet(HTML) 4 Page - List of Unclassifed Manufacturers |
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4 / 17 page  G -LINK GLT44016 256K X 16 CMOS DYNAMIC RAM WITH EXTENDED DATA OUTPUT Aug, 2000(Rev.3.1) G-Link Technology Corporation 2701Northwestern Parkway Santa Clara, CA 95051, U.S.A. G-Link Technology Corporation,Taiwan 6F, No. 24-2, Industry E. RD. IV, Science Based Industrial Park, Hsin Chu, Taiwan. - 4 - Truth Table: GLT44016 Function RAS CASL CASH WE OE ADDRESS DQs Notes Stanby H H →X H →X X X High-Z Read: Word L L L H L ROW/COL Data Out Read: Lower Byte L L H H L ROW/COL Lower Byte,Data-Out Upper Byte,High-Z Read: Upper Byte L H L H L ROW/COL Lower Byte,High-Z Upper Byte,Data-Out Write: Word(Early Write) L L L L X ROW/COL Data-In Write: Lower Byte (Early) L L H L X ROW/COL Lower Byte,Data-In Upper Byte,High-Z Write: Upper Byte (Early) L H L L X ROW/COL Lower Byte,High-Z Upper Byte,Data-In Read Write L L L H →L L →H ROW/COL Data-Out,Data-In 1,2 EDO-Page- Mode Read 1st Cycle 2nd Cycle L L H →L H →L H →L H →L H H L L ROW/COL COL Data-Out Data-Out 1 1 EDO-Page- Mode Write 1st Cycle 2nd Cycle L L H →L H →L H →L H →L L L X X ROW/COL COL Data-In Data-In 2 2 EDO-Page- Mode Read- Write 1st Cycle 2nd Cycle L L H →L H →L H →L H →L H →L H →L L →H L →H ROW/COL COL Data-Out,Data-In Data-Out,Data-In 1,2 1,2 Hidden Refresh Read Write L →H→L L →H→L L L L L H L L X ROW/COL ROW/COL Data-Out Data-In 1 2,3 RAS -Only Refresh L H H X X ROW High-Z CBR Refresh H →L L L X X High-Z 4 Notes: 1. These READ cycles may also be BYTE READ cycles (either UCAS or LCAS active). 2. These WRITE cycles may also be BYTE READ cycles (either UCAS or LCAS active). 3. EARLY WRITE only. 4. At least one of the two CAS signals must be active ( UCAS or LCAS ). |
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