EC9223

Multi-Channel TFT LCD Supply

E-CMOS Corp. (www.ecmos.com.tw)

5E26N-Rev. F001

8/13

Low-Voltage Detector

2.6

V

Reset Threshold

100

mV

RSTnn Output Voltage

0.4

V

Reset Blanking Time

120

ms

Application Information

The EC9223 offers an all-in-one solution for TFT LCD. The chip includes a high-efficiency boost converter with a

20V/1.8A on-chip N-channel transistor for biasing of the LCD, a regulated positive charge pump, a regulated

negative charge pump, and a unity-gain VCOM buffer. A voltage detector circuit generates a reset signal when

the input voltage falls below 2.6V.

TFT LCD Boost Converter (AVDD)

The LCD panel AVDD supply is generated from a high-efficiency PWM boost converter operating with current

mode control, and the switching frequency is 1.2MHz. During the on-period, TON, the synchronous FET

connects one end of the inductor to ground, therefore increasing the inductor current. After the FET turns off, the

inductor switching node, LX, is charged to a positive voltage by the inductor current. The freewheeling diode

turns on and the inductor current flows to the output capacitor. The converter operates in the continuous

conduction mode (CCM) when the average input current IIN is at least one-half of the inductor peak- to-peak

The output voltage, AVDD, is determined by the duty cycle, D, of the power FET on-time and the input voltage,

where η is the power conversion efficiency. For a lower load current, the inductor current would decay to zero during the free-

wheeling period and the output node would be disconnected from the inductor for the remaining portion of the switching

period. The converter would operate in the discontinuous conduction mode (DCM). Current mode control is well known for its

robustness and fast transient response. An inner current feedback loop sets the on-time and the duty cycle such that the

current through the inductor equals to the current computed by the compensator. This loop acts within one switching cycle. A

slope compensation ramp is added to suppress sub-harmonic oscillations. An outer voltage feedback loop subtracts the

voltage on the FB pin from the internal reference voltage and feeds the difference to the compensator operational

transconductance (Gm) amplifier. This amplifier is compensated by an external R-C network to allow the user to optimize the

transient response and loop stability for the specific application conditions.